VLSILab - User contributions [en]

Nicholas Sica

2023-03-15T18:42:59Z

Njs82:

[[File:Nick.png|175px|thumb|right|Nicholas Sica]]

==Education==
'''Ph.D. in Electrical Engineering, ongoing''' 
:Drexel University, Philadelphia, PA, USA

'''B.S. in Computer Engineering, 2021''' 
:Drexel University, Philadelphia, PA, USA

==Research Interests==
* Phase-based computing
* Adiabatic circuits
* Quantum Computing

==Résumé==
[[media:nick_sica_resume.pdf | Nicholas Sica (December 2021)]]

==Publications==

====Conferences====
#Ragh Kuttappa, Leo Filippini, Nicholas Sica and Baris Taskin, "Scalable Resonant Power Clock Generation for Adiabatic Logic Design," ''2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)'', 2021, pp. 338-342.

==Awards==
#'''National Science Foundation Graduate Research Fellowship Program(NSF GRFP)''' 2022-2026
#'''George Hill, Jr. Endowed Fellowship''' 2021-2024
#'''Magna Cum Laude''' 2021
#'''Dean’s List Distinction''' 2016-2021
#'''A. J. Drexel Scholarship''' 2016-2021
#'''Drexel Grant''' 2016-2021

==Contact Information==
'''Address:''' 
3141 Chestnut Street 
Drexel University 
ECE Department 
Philadelphia, PA 19104 

'''Office:''' Bossone 405 
'''Email:''' njs82@drexel.edu 
'''Linkedin:''' [https://www.linkedin.com/in/nicholassica/ nicholassica/linkedin]

Nicholas Sica

2023-03-15T18:41:48Z

Njs82:

[[File:Nick.png|175px|thumb|right|Nicholas Sica]]

==Education==
'''Ph.D. in Electrical Engineering, ongoing''' 
:Drexel University, Philadelphia, PA, USA

'''B.S. in Computer Engineering, 2021''' 
:Drexel University, Philadelphia, PA, USA

==Research Interests==
* Phase-based computing
* Adiabatic circuits
* Quantum Computing

==Résumé==
[[media:nick_sica_resume.pdf | Nicholas Sica (December 2021)]]

==Publications==

====Conferences====
#Ragh Kuttappa, Leo Filippini, Nicholas Sica and Baris Taskin, "Scalable Resonant Power Clock Generation for Adiabatic Logic Design," ''2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)'', 2021, pp. 338-342.

==Awards==
#National Science Foundation Graduate Research Fellowship Program(NSF GRFP) 2022-2026
#George Hill, Jr. Endowed Fellowship 2021-2024
#Magna Cum Laude 2021
#Dean’s List Distinction 2016-2021
#A. J. Drexel Scholarship 2016-2021
#Drexel Grant 2016-2021

==Contact Information==
'''Address:''' 
3141 Chestnut Street 
Drexel University 
ECE Department 
Philadelphia, PA 19104 

'''Office:''' Bossone 405 
'''Email:''' njs82@drexel.edu 
'''Linkedin:''' [https://www.linkedin.com/in/nicholassica/ nicholassica/linkedin]

File:Sief resume.pdf

2023-03-15T18:27:03Z

Njs82: Njs82 uploaded a new version of File:Sief resume.pdf

Sief Atari

2023-03-15T18:25:23Z

Njs82: /* Résumé */

==Education==
'''Ph.D. in Electrical Engineering, ongoing''' 
:Drexel University, Philadelphia, PA, USA

'''B.S. in Electrical & Computer Engineering, 2022''' 
:University of Bridgeport, Bridgeport, CT, USA

==Research Interests==
* System level interconnects for 2D chips and above
* Applying metamaterials to integrated circuits

==Curriculum Vitae==
[[media:sief_resume.pdf | Sief Atari (March 2023)]]

==Contact Information==
'''Address:''' 
3141 Chestnut Street 
Drexel University 
ECE Department 
Philadelphia, PA 19104 

'''Office:''' Bossone 405 
'''Email:''' sa3848@drexel.edu 
'''Linkedin:''' [https://www.linkedin.com/in/siefatari/ siefatari/linkedin]

File:Sief resume.pdf

2023-03-15T18:24:43Z

Njs82: Njs82 uploaded a new version of File:Sief resume.pdf

File:Sief resume.pdf

2023-03-15T18:16:18Z

Njs82:

Sief Atari

2023-03-15T18:15:54Z

Njs82:

==Education==
'''Ph.D. in Electrical Engineering, ongoing''' 
:Drexel University, Philadelphia, PA, USA

'''B.S. in Electrical & Computer Engineering, 2022''' 
:University of Bridgeport, Bridgeport, CT, USA

==Research Interests==
* System level interconnects for 2D chips and above
* Applying metamaterials to integrated circuits

==Résumé==
[[media:sief_resume.pdf | Sief Atari (March 2023)]]

==Contact Information==
'''Address:''' 
3141 Chestnut Street 
Drexel University 
ECE Department 
Philadelphia, PA 19104 

'''Office:''' Bossone 405 
'''Email:''' sa3848@drexel.edu 
'''Linkedin:''' [https://www.linkedin.com/in/siefatari/ siefatari/linkedin]

Sief Atari

2023-03-15T18:15:23Z

Njs82:

==Education==
'''Ph.D. in Electrical Engineering, ongoing''' 
:Drexel University, Philadelphia, PA, USA

'''B.S. in Electrical & Computer Engineering, 2022''' 
:University of Bridgeport, Bridgeport, CT, USA

==Research Interests==
* System level interconnects for 2D chips and above
* Applying metamaterials to integrated circuits

==Résumé==
[[media:resume.pdf | Sief Atari (March 2023)]]

==Publications==
#List Publication 1
[comment] <> (#List Publication 2)

====Conferences====
#List Publication 1
#List Publication 2

==Contact Information==
'''Address:''' 
3141 Chestnut Street 
Drexel University 
ECE Department 
Philadelphia, PA 19104 

'''Office:''' Bossone 405 
'''Email:''' sa3848@drexel.edu 
'''Linkedin:''' [https://www.linkedin.com/in/siefatari/ siefatari/linkedin]

Sief Atari

2023-03-15T18:15:14Z

Njs82:

==Education==
'''Ph.D. in Electrical Engineering, ongoing''' 
:Drexel University, Philadelphia, PA, USA

'''B.S. in Electrical & Computer Engineering, 2022''' 
:University of Bridgeport, Bridgeport, CT, USA

==Research Interests==
* System level interconnects for 2D chips and above
* Applying metamaterials to integrated circuits

==Résumé==
[[media:resume.pdf | Sief Atari (March 2023)]]

==Publications==
#List Publication 1
[comment] <> #List Publication 2

====Conferences====
#List Publication 1
#List Publication 2

==Contact Information==
'''Address:''' 
3141 Chestnut Street 
Drexel University 
ECE Department 
Philadelphia, PA 19104 

'''Office:''' Bossone 405 
'''Email:''' sa3848@drexel.edu 
'''Linkedin:''' [https://www.linkedin.com/in/siefatari/ siefatari/linkedin]

Sief Atari

2023-03-15T18:15:05Z

Njs82:

==Education==
'''Ph.D. in Electrical Engineering, ongoing''' 
:Drexel University, Philadelphia, PA, USA

'''B.S. in Electrical & Computer Engineering, 2022''' 
:University of Bridgeport, Bridgeport, CT, USA

==Research Interests==
* System level interconnects for 2D chips and above
* Applying metamaterials to integrated circuits

==Résumé==
[[media:resume.pdf | Sief Atari (March 2023)]]

==Publications==
#List Publication 1
[comment] #List Publication 2

====Conferences====
#List Publication 1
#List Publication 2

==Contact Information==
'''Address:''' 
3141 Chestnut Street 
Drexel University 
ECE Department 
Philadelphia, PA 19104 

'''Office:''' Bossone 405 
'''Email:''' sa3848@drexel.edu 
'''Linkedin:''' [https://www.linkedin.com/in/siefatari/ siefatari/linkedin]

Sief Atari

2023-03-15T18:12:27Z

Njs82:

==Education==
'''Ph.D. in Electrical Engineering, ongoing''' 
:Drexel University, Philadelphia, PA, USA

'''B.S. in Electrical & Computer Engineering, 2022''' 
:University of Bridgeport, Bridgeport, CT, USA

==Research Interests==
* System level interconnects for 2D chips and above
* Applying metamaterials to integrated circuits

==Résumé==
[[media:resume.pdf | Sief Atari (March 2023)]]

==Publications==
#List Publication 1
#List Publication 2

====Conferences====
#List Publication 1
#List Publication 2

==Contact Information==
'''Address:''' 
3141 Chestnut Street 
Drexel University 
ECE Department 
Philadelphia, PA 19104 

'''Office:''' Bossone 405 
'''Email:''' sa3848@drexel.edu 
'''Linkedin:''' [https://www.linkedin.com/in/siefatari/ siefatari/linkedin]

Ceyhun Kayan

2023-02-07T17:39:28Z

Njs82: /* Education */

==Education==
'''Ph.D. in blah blah, ongoing''' 
:Drexel University, Philadelphia, PA, USA

'''B.S. in blah blah, grad year''' 
:University, Location

==Research Interests==
* Research interest 1
* Research interest 2

==Résumé==
[[media:resume.pdf | Name (Month Year Edited)]]

==Publications==
#List Publication 1
#List Publication 2

====Conferences====
#List Publication 1
#List Publication 2

==Contact Information==
'''Address:''' 
3141 Chestnut Street 
Drexel University 
ECE Department 
Philadelphia, PA 19104 

'''Office:''' Bossone 405 
'''Email:''' abc123@drexel.edu 
'''Linkedin:''' [https://www.linkedin.com/in/mylinkedinurl/ myname/linkedin]

Yilmaz Gonul

2023-02-07T17:39:17Z

Njs82: /* Education */

Sief Atari

2023-02-07T17:39:08Z

Njs82: /* Education */

People

2023-02-07T17:38:40Z

Njs82: /* Ph.D. Students */

== Faculty ==
[[Baris Taskin]]

[[Baris Taskin | [Biography, Curriculum Vitae and Contact Info]]]



== Ph.D. Students ==

[[Sief Atari]]

[[Yilmaz Gonul]]

[[Ceyhun Kayan]]

[[Scott Lerner]]

[[Michael Lui]]

[[Nicholas Sica]]

== MS Students ==



== Group Alumni ==

=== PhD graduates ===
[[Ragh Kuttappa]] (Ph.D 2021) [First job: Intel], Dissertation: "Scalable and Shareable Resonant Rotary Clocks"

[[Karthik Sangaiah]] (Ph.D. 2020) [First job: AMD Research], Dissertation: "Reimagining the Role of Network-on-Chip Resources Toward Improving Chip Multiprocessor Performance"

[[Vasil Pano]] (Ph.D. 2019) [First job: Post-Doc, Intel], Dissertation: "Wireless Network on Chip for Multi-Die Systems"

[[Leo Filippini]] (Ph.D. 2019) [First job: Voxtel, OR], Dissertation: "Charge Recovery Circuits"

[[Rizwana Begum]] (Ph.D., 2016) [First job: Intel], Dissertation: ''Energy Management of Multi-Component Computing Platforms Under Energy Constraints'' (advisor: Mark Hempstead, Tufts University)

[[Can Sitik]] (Ph.D., 2015) [First job: Intel], Dissertation: ''Design and Automation of Voltage-Scaled Clock Networks''

[[Ying Teng]] (Ph.D., 2014) [First job: Apple], Dissertation: ''Low Power Resonant Rotary Global Clock Distribution Network Design''

[[Ankit More]] (Ph.D., 2013) [First job: Intel], Dissertation: ''Network-on-Chip (NoC) Architectures for Exa-Scale Chip-Multi-Processors (CMPs)''

[[Jianchao Lu]] (Ph.D., 2011), [First job: Synopsys], Dissertation: ''High Performance IC Clock Networks with Grid and Tree Topologies''

[[Vinayak Honkote]] (Ph.D., 2010), [First job: Intel], Dissertation: ''Design Automation and Analysis of Resonant Clocking Technologies''

=== MS graduates ===

Angela Wei (MS, 2021) [First job: SAP] Thesis: "Novel Wireless Non-Uniform Multi-Die Systems"

[[Dongen Bradley Zhou]] (2021)

Steven Khoa (MS, 2020) [First job: There that must not be named] Thesis: "Adiabatic Step-Charging Power-Clock Generator"

Adarsha Balaji (MS, 2018) [Ph.D. at Drexel University]

Isikcan Yilmaz (MS, 2018) [First job: Apple]

Stephen DeLuca (MS, 2015) [First job: Intel]

Julian Kemmerer, (MS 2014) [First job: Susquehanna International Group]

Swetha George (MS 2012) [Ph.D. at the University of Rochester]

Kevin Daly (MS, 2011) [There that must not be named]

[[Sharat C. Shekar]] (MS, 2011) [First job: Samsung Austin Research]

Xiaomi Mao (MS, 2011) [First job: Oracle/Sun]

Yaswanth Simhadri (MS, 2008)

Shannon M. Kurtas (BS/MS, 2007) [First job: Intel], Thesis: ''Statistical Static Timing Analysis of Nonzero Clock Skew Circuits''

=== Visiting graduate students ===

Milene Douarche (2017) [MS student visiting from Grenoble Institute of Technology, France]

Jonghoon Oh (2016) [PhD student visiting from Japan Advanced Institute of Technology, Japan]

Sophie Germain (2015) [MS student visiting from Grenoble Institute of Technology, France]

=== Undergraduate Researchers ===

Malachi Moody (2020) [Delaware State University- NSF REU]}

Eric Zane (2020) [Rowan University - NSF REU]}

Angela Wei (2019) [Drexel]

Steven Khoa (2019) [Drexel]

Albert Emanuel Milani (2019) [Drexel, REU]

Kathrina Waugh (2018) [Drexel STARS scholar]

Rhea Dutta (2018) [Drexel STARS scholar]

Neil Eelman (2018-2019) [Drexel]

Irmak Gezginer (2017) [Middle East Technical University]

Daniel Heuckeroth (2016) [Drexel STARS scholar]

Albert Emanuel Milani (2016) [Drexel STARS scholar]

Nazzareno Farnesi (2016) [Drexel, Drexel STARS scholar]

Brian Hosler (2015-2016) [Drexel]

Eric Leggett, Jr (2015-2016) [Drexel]

Gabrielle Madden (2015) [Drexel STARS scholar]

Isikcan Yilmaz (2015-2016) [Drexel, MS at Drexel]

Eronides Felisberto Da Silva Neto (2015) [Temple]

George Slavin (2015) [Drexel]

Habeeb Olawin (2014) [Drexel STARS scholar]

Fernando Ellis (2013) [RIT - NSF REU]

Daniel Schoepflin (2013) [Drexel STARS scholar]

Giordano Salvador (2013-2014) [Penn - NSF REU, GRFP 2015, PhD at UIUC]

[[Vasil Pano]] (2013-2014) [Drexel, PhD at Drexel]

Andrew Apollonsky (2012) [Cooper Union - NSF REU]

Michael Miller (2012) [Goshen College - NSF REU, GRFP 2015, grad school at CMU]

Michael Sineriz (2012) [Maryland - NSF REU]

[[Scott Lerner ]](2012-2014) [Drexel, GRFP 2015, PhD at Drexel]

Isuru Daulagala (2012) [Drexel]

Catherine Leis (2011) [Drexel, MS at Penn]

Asha Habib (2011) [Bryn Mawr College - NSF REU]

Kevin Linger (2011) [University of Virginia - NSF REU]

Andrew Richard Benton (2011) [Drexel STARS scholar]

David Hocky (2011) [Drexel STARS scholar]

Yusuf Aksehir (2010) [Sabanci University]

Abdalla Musmar (2010) [An-Najah National University - NSF REU, graduate school at CMU]

Michael Edoror (2010) [University of Maryland - NSF REU]

Bo Hyun Kim (2010) [Carnegie Mellon University, graduate school at Columbia University]

S. Kutal Gokce (2008) [Middle East Technical University (METU), M.S. at Koc University, Ph.D. at U of Texas-Austin]

Can Hankendi (2008) [Sabanci University, M.S. at USC, Ph.D. at Boston University]

Danh Nguyen (2007) [Ph.D. at Drexel University]

*Director of REU Site: Computing for Power and Energy (2010-2013) http://reu.ece.drexel.edu



=== High-School Researchers ===

Ioannis A. Savidis (2019) [Undergraduate at Drexel University]

Edison Kim (2016) [Undergraduate at Temple University]

Ilteris K. Canberk (2010) [Robert College, undergraduate at Carnegie Mellon University]

Main Page

2023-02-07T17:38:25Z

Njs82: /* Ph.D. students */

__NOTOC__

[[File:VANDAL.png|right|super|200px]]

== Drexel VLSI and Architecture Laboratory (VANDAL) ==

Drexel VANDAL group consists of a research group of computer engineers and electrical engineers tackling high impact engineering problems with the objective of building sophisticated systems. 

VANDAL has been home to researchers involved closely with the design, analysis, implementation of integrated circuits, chip architectures and software with a focused goal of implementing sophisticated systems. Suited with industrial design tools for integrated circuits, simulation tools and measurement beds, the VANDAL team can design and test digital and mixed-signal circuitry to verify the functionality of the discovered novel circuit and physical design principles. The group also develops new tools and methodologies to improve application performance and efficiency through optimization of both software and hardware architectures. The VANDAL team explores a gamut of workloads including High-Performance Computing, Data Center, GPU, Machine Learning, and Cryptocurrencies. Some of the most exciting projects currently ongoing involve:

# ''Charge Recovering Systems for IoT, Bio-Implants and Energy Harvesting'': Charge recycling logic typically aims at recycling, or recovering, charge that is usually wasted in normal circuits. Since this charge is recycled, Charge Recovery Circuits consume less energy than standard circuits, allowing, for example, a longer battery life.
# ''Aging-Resilient IoT Hardware'': The VLSI group develops automated mitigation techniques that ensure device operation in the toughest environments. Electronics degrade over time and lead to slower operation including failure to operate. By using predictive models with targeted mitigation techniques, electronic devices maintain their operation for longer periods of time.
# ''Energy-Efficient Clock Synchronization for Computing Systems'': The design of clock networks is integral to ensuring fast performance of integrated circuits. The VLSI lab creates automated tools and design methodologies for the synthesis of exa-scale clock networks that require advanced techniques such as Deep Neural Networks. These tools and design methodologies aid in developing novel clocking techniques such as resonant clocking and wireless interconnects.
# ''Hardware and Software Co-Design for Exascale Computing Systems'': With the growth in the number of cores in chip multi-processors (CMP), it is essential to design for scalable communication interconnects. We explore the modeling and design of networks-on-chips (NoCs) as a fabric interconnecting cores in future high-performance chip multi-processors (CMPs).
# ''Communication Infrastructure for Chip-Multi-Processors and 5G IoT systems within Smart Office Spaces'': Wireless communication on-chip are investigated to replace the resource-demanding, conventional, wire-based interconnect networks within integrated circuits. Wireless communication will provide a solution that is highly scalable into the future for the IC communication challenge, as increases in technology scaling and die size dimensions are forecast by the semiconductor industry.

# ''Cyber Physical Design Automation of Smart Homes/Smart Cities'': Through managing energy efficiency and cost-effectiveness. Building an embedded-system based smart CPS platform for power systems. A modern approach in meeting today’s technological need is to use Internet of Things (IoT). Through adaptive exchange of data, hardware equipments are designed to operate autonomously without human supervision. In assistance of our increasing need in electric power, we design this intelligent agent to manage the operation of electric power distribution. In advancement of our understanding in Cyber-Physical System (CPS), we study the physical limit such systems can be designed to delegate.

[http://www.drexel.edu Drexel University]

[http://www.ece.drexel.edu Department of Electrical and Computer Engineering]

[http://maps.google.com/maps?f=q&source=s_q&hl=en&geocode=&q=3141+chestnut+Street+19104&sll=37.649034,-95.712891&sspn=37.558981,49.21875&ie=UTF8&ll=39.963241,-75.181932&spn=0.008948,0.012016&z=14&iwloc=A&amp 3141 Chestnut Street (map) ]

324 Bossone Research Center

Philadelphia, PA 19104



----

== [[People]] ==

=== Faculty ===

[[Baris Taskin| Baris Taskin (Biography, CV, Contact)]]

=== Ph.D. students ===

[[Sief Atari]]

[[Yilmaz Gonul]]

[[Ceyhun Kayan]]

[[Scott Lerner]]

[[Michael Lui]]

[[Nicholas Sica]]

=== Other researchers ===

See [[People]]

== [[Research]] ==



== [[Publications]] ==

== [[Software]] ==

[https://github.com/VANDAL Github]

[[Software#SynchroTrace|SynchroTrace]]


== [[Seminars]] ==

== [[Tutorials]] ==

== [[Teaching]] ==

== [[News/Events]] ==

Ceyhun Kayan

2023-02-07T17:31:31Z

Njs82: Created page with "==Education== '''Ph.D in blah blah, ongoing''' :Drexel University, Philadelphia, PA, USA '''B.S. in blah blah, grad year''' :University, Location ==Research Inte..."

==Education==
'''Ph.D in blah blah, ongoing''' 
:Drexel University, Philadelphia, PA, USA

'''B.S. in blah blah, grad year''' 
:University, Location

==Research Interests==
* Research interest 1
* Research interest 2

==Résumé==
[[media:resume.pdf | Name (Month Year Edited)]]

==Publications==
#List Publication 1
#List Publication 2

====Conferences====
#List Publication 1
#List Publication 2

==Contact Information==
'''Address:''' 
3141 Chestnut Street 
Drexel University 
ECE Department 
Philadelphia, PA 19104 

'''Office:''' Bossone 405 
'''Email:''' abc123@drexel.edu 
'''Linkedin:''' [https://www.linkedin.com/in/mylinkedinurl/ myname/linkedin]

Yilmaz Gonul

2023-02-07T17:31:20Z

Sief Atari

2023-02-07T17:30:59Z

People

2023-02-07T17:27:25Z

Njs82: /* Ph.D. Students */

== Faculty ==
[[Baris Taskin]]

[[Baris Taskin | [Biography, Curriculum Vitae and Contact Info]]]



== Ph.D. Students ==

[[Scott Lerner]]

[[Michael Lui]]

[[Nicholas Sica]]

[[Sief Atari]]

[[Yilmaz Gonul]]

[[Ceyhun Kayan]]

== MS Students ==



== Group Alumni ==

=== PhD graduates ===
[[Ragh Kuttappa]] (Ph.D 2021) [First job: Intel], Dissertation: "Scalable and Shareable Resonant Rotary Clocks"

[[Karthik Sangaiah]] (Ph.D. 2020) [First job: AMD Research], Dissertation: "Reimagining the Role of Network-on-Chip Resources Toward Improving Chip Multiprocessor Performance"

[[Vasil Pano]] (Ph.D. 2019) [First job: Post-Doc, Intel], Dissertation: "Wireless Network on Chip for Multi-Die Systems"

[[Leo Filippini]] (Ph.D. 2019) [First job: Voxtel, OR], Dissertation: "Charge Recovery Circuits"

[[Rizwana Begum]] (Ph.D., 2016) [First job: Intel], Dissertation: ''Energy Management of Multi-Component Computing Platforms Under Energy Constraints'' (advisor: Mark Hempstead, Tufts University)

[[Can Sitik]] (Ph.D., 2015) [First job: Intel], Dissertation: ''Design and Automation of Voltage-Scaled Clock Networks''

[[Ying Teng]] (Ph.D., 2014) [First job: Apple], Dissertation: ''Low Power Resonant Rotary Global Clock Distribution Network Design''

[[Ankit More]] (Ph.D., 2013) [First job: Intel], Dissertation: ''Network-on-Chip (NoC) Architectures for Exa-Scale Chip-Multi-Processors (CMPs)''

[[Jianchao Lu]] (Ph.D., 2011), [First job: Synopsys], Dissertation: ''High Performance IC Clock Networks with Grid and Tree Topologies''

[[Vinayak Honkote]] (Ph.D., 2010), [First job: Intel], Dissertation: ''Design Automation and Analysis of Resonant Clocking Technologies''

=== MS graduates ===

Angela Wei (MS, 2021) [First job: SAP] Thesis: "Novel Wireless Non-Uniform Multi-Die Systems"

[[Dongen Bradley Zhou]] (2021)

Steven Khoa (MS, 2020) [First job: There that must not be named] Thesis: "Adiabatic Step-Charging Power-Clock Generator"

Adarsha Balaji (MS, 2018) [Ph.D. at Drexel University]

Isikcan Yilmaz (MS, 2018) [First job: Apple]

Stephen DeLuca (MS, 2015) [First job: Intel]

Julian Kemmerer, (MS 2014) [First job: Susquehanna International Group]

Swetha George (MS 2012) [Ph.D. at the University of Rochester]

Kevin Daly (MS, 2011) [There that must not be named]

[[Sharat C. Shekar]] (MS, 2011) [First job: Samsung Austin Research]

Xiaomi Mao (MS, 2011) [First job: Oracle/Sun]

Yaswanth Simhadri (MS, 2008)

Shannon M. Kurtas (BS/MS, 2007) [First job: Intel], Thesis: ''Statistical Static Timing Analysis of Nonzero Clock Skew Circuits''

=== Visiting graduate students ===

Milene Douarche (2017) [MS student visiting from Grenoble Institute of Technology, France]

Jonghoon Oh (2016) [PhD student visiting from Japan Advanced Institute of Technology, Japan]

Sophie Germain (2015) [MS student visiting from Grenoble Institute of Technology, France]

=== Undergraduate Researchers ===

Malachi Moody (2020) [Delaware State University- NSF REU]}

Eric Zane (2020) [Rowan University - NSF REU]}

Angela Wei (2019) [Drexel]

Steven Khoa (2019) [Drexel]

Albert Emanuel Milani (2019) [Drexel, REU]

Kathrina Waugh (2018) [Drexel STARS scholar]

Rhea Dutta (2018) [Drexel STARS scholar]

Neil Eelman (2018-2019) [Drexel]

Irmak Gezginer (2017) [Middle East Technical University]

Daniel Heuckeroth (2016) [Drexel STARS scholar]

Albert Emanuel Milani (2016) [Drexel STARS scholar]

Nazzareno Farnesi (2016) [Drexel, Drexel STARS scholar]

Brian Hosler (2015-2016) [Drexel]

Eric Leggett, Jr (2015-2016) [Drexel]

Gabrielle Madden (2015) [Drexel STARS scholar]

Isikcan Yilmaz (2015-2016) [Drexel, MS at Drexel]

Eronides Felisberto Da Silva Neto (2015) [Temple]

George Slavin (2015) [Drexel]

Habeeb Olawin (2014) [Drexel STARS scholar]

Fernando Ellis (2013) [RIT - NSF REU]

Daniel Schoepflin (2013) [Drexel STARS scholar]

Giordano Salvador (2013-2014) [Penn - NSF REU, GRFP 2015, PhD at UIUC]

[[Vasil Pano]] (2013-2014) [Drexel, PhD at Drexel]

Andrew Apollonsky (2012) [Cooper Union - NSF REU]

Michael Miller (2012) [Goshen College - NSF REU, GRFP 2015, grad school at CMU]

Michael Sineriz (2012) [Maryland - NSF REU]

[[Scott Lerner ]](2012-2014) [Drexel, GRFP 2015, PhD at Drexel]

Isuru Daulagala (2012) [Drexel]

Catherine Leis (2011) [Drexel, MS at Penn]

Asha Habib (2011) [Bryn Mawr College - NSF REU]

Kevin Linger (2011) [University of Virginia - NSF REU]

Andrew Richard Benton (2011) [Drexel STARS scholar]

David Hocky (2011) [Drexel STARS scholar]

Yusuf Aksehir (2010) [Sabanci University]

Abdalla Musmar (2010) [An-Najah National University - NSF REU, graduate school at CMU]

Michael Edoror (2010) [University of Maryland - NSF REU]

Bo Hyun Kim (2010) [Carnegie Mellon University, graduate school at Columbia University]

S. Kutal Gokce (2008) [Middle East Technical University (METU), M.S. at Koc University, Ph.D. at U of Texas-Austin]

Can Hankendi (2008) [Sabanci University, M.S. at USC, Ph.D. at Boston University]

Danh Nguyen (2007) [Ph.D. at Drexel University]

*Director of REU Site: Computing for Power and Energy (2010-2013) http://reu.ece.drexel.edu



=== High-School Researchers ===

Ioannis A. Savidis (2019) [Undergraduate at Drexel University]

Edison Kim (2016) [Undergraduate at Temple University]

Ilteris K. Canberk (2010) [Robert College, undergraduate at Carnegie Mellon University]

People

2023-02-07T17:27:03Z

Njs82: /* Ph.D. Students */

Main Page

2023-02-07T17:25:23Z

Njs82: /* Ph.D. students */

__NOTOC__

[[File:VANDAL.png|right|super|200px]]

== Drexel VLSI and Architecture Laboratory (VANDAL) ==

Drexel VANDAL group consists of a research group of computer engineers and electrical engineers tackling high impact engineering problems with the objective of building sophisticated systems. 

VANDAL has been home to researchers involved closely with the design, analysis, implementation of integrated circuits, chip architectures and software with a focused goal of implementing sophisticated systems. Suited with industrial design tools for integrated circuits, simulation tools and measurement beds, the VANDAL team can design and test digital and mixed-signal circuitry to verify the functionality of the discovered novel circuit and physical design principles. The group also develops new tools and methodologies to improve application performance and efficiency through optimization of both software and hardware architectures. The VANDAL team explores a gamut of workloads including High-Performance Computing, Data Center, GPU, Machine Learning, and Cryptocurrencies. Some of the most exciting projects currently ongoing involve:

# ''Charge Recovering Systems for IoT, Bio-Implants and Energy Harvesting'': Charge recycling logic typically aims at recycling, or recovering, charge that is usually wasted in normal circuits. Since this charge is recycled, Charge Recovery Circuits consume less energy than standard circuits, allowing, for example, a longer battery life.
# ''Aging-Resilient IoT Hardware'': The VLSI group develops automated mitigation techniques that ensure device operation in the toughest environments. Electronics degrade over time and lead to slower operation including failure to operate. By using predictive models with targeted mitigation techniques, electronic devices maintain their operation for longer periods of time.
# ''Energy-Efficient Clock Synchronization for Computing Systems'': The design of clock networks is integral to ensuring fast performance of integrated circuits. The VLSI lab creates automated tools and design methodologies for the synthesis of exa-scale clock networks that require advanced techniques such as Deep Neural Networks. These tools and design methodologies aid in developing novel clocking techniques such as resonant clocking and wireless interconnects.
# ''Hardware and Software Co-Design for Exascale Computing Systems'': With the growth in the number of cores in chip multi-processors (CMP), it is essential to design for scalable communication interconnects. We explore the modeling and design of networks-on-chips (NoCs) as a fabric interconnecting cores in future high-performance chip multi-processors (CMPs).
# ''Communication Infrastructure for Chip-Multi-Processors and 5G IoT systems within Smart Office Spaces'': Wireless communication on-chip are investigated to replace the resource-demanding, conventional, wire-based interconnect networks within integrated circuits. Wireless communication will provide a solution that is highly scalable into the future for the IC communication challenge, as increases in technology scaling and die size dimensions are forecast by the semiconductor industry.

# ''Cyber Physical Design Automation of Smart Homes/Smart Cities'': Through managing energy efficiency and cost-effectiveness. Building an embedded-system based smart CPS platform for power systems. A modern approach in meeting today’s technological need is to use Internet of Things (IoT). Through adaptive exchange of data, hardware equipments are designed to operate autonomously without human supervision. In assistance of our increasing need in electric power, we design this intelligent agent to manage the operation of electric power distribution. In advancement of our understanding in Cyber-Physical System (CPS), we study the physical limit such systems can be designed to delegate.

[http://www.drexel.edu Drexel University]

[http://www.ece.drexel.edu Department of Electrical and Computer Engineering]

[http://maps.google.com/maps?f=q&source=s_q&hl=en&geocode=&q=3141+chestnut+Street+19104&sll=37.649034,-95.712891&sspn=37.558981,49.21875&ie=UTF8&ll=39.963241,-75.181932&spn=0.008948,0.012016&z=14&iwloc=A&amp 3141 Chestnut Street (map) ]

324 Bossone Research Center

Philadelphia, PA 19104



----

== [[People]] ==

=== Faculty ===

[[Baris Taskin| Baris Taskin (Biography, CV, Contact)]]

=== Ph.D. students ===

[[Scott Lerner]]

[[Michael Lui]]

[[Nicholas Sica]]

[[Sief Atari]]

[[Yilmaz Gonul]]

[[Ceyhun Kayan]]

=== Other researchers ===

See [[People]]

== [[Research]] ==



== [[Publications]] ==

== [[Software]] ==

[https://github.com/VANDAL Github]

[[Software#SynchroTrace|SynchroTrace]]


== [[Seminars]] ==

== [[Tutorials]] ==

== [[Teaching]] ==

== [[News/Events]] ==

Nicholas Sica

2021-12-08T20:33:31Z

Njs82: /* Conferences */

[[File:Nick.png|175px|thumb|right|Nicholas Sica]]

==Education==
'''Ph.D. in Electrical Engineering, ongoing''' 
:Drexel University, Philadelphia, PA, USA

'''B.S. in Computer Engineering, 2021''' 
:Drexel University, Philadelphia, PA, USA

==Research Interests==
* Phase-based computing
* Adiabatic circuits
* Quantum Computing

==Résumé==
[[media:nick_sica_resume.pdf | Nicholas Sica (December 2021)]]

==Publications==

====Conferences====
#Ragh Kuttappa, Leo Filippini, Nicholas Sica and Baris Taskin, "Scalable Resonant Power Clock Generation for Adiabatic Logic Design," ''2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)'', 2021, pp. 338-342.

==Contact Information==
'''Address:''' 
3141 Chestnut Street 
Drexel University 
ECE Department 
Philadelphia, PA 19104 

'''Office:''' Bossone 405 
'''Email:''' njs82@drexel.edu 
'''Linkedin:''' [https://www.linkedin.com/in/nicholassica/ nicholassica/linkedin]

Main Page

2021-12-08T20:31:41Z

Njs82: /* Ph.D. students */

__NOTOC__

[[File:VANDAL.png|right|super|200px]]

== Drexel VLSI and Architecture Laboratory (VANDAL) ==

Drexel VANDAL group consists of a research group of computer engineers and electrical engineers tackling high impact engineering problems with the objective of building sophisticated systems. 

VANDAL has been home to researchers involved closely with the design, analysis, implementation of integrated circuits, chip architectures and software with a focused goal of implementing sophisticated systems. Suited with industrial design tools for integrated circuits, simulation tools and measurement beds, the VANDAL team can design and test digital and mixed-signal circuitry to verify the functionality of the discovered novel circuit and physical design principles. The group also develops new tools and methodologies to improve application performance and efficiency through optimization of both software and hardware architectures. The VANDAL team explores a gamut of workloads including High-Performance Computing, Data Center, GPU, Machine Learning, and Cryptocurrencies. Some of the most exciting projects currently ongoing involve:

# ''Charge Recovering Systems for IoT, Bio-Implants and Energy Harvesting'': Charge recycling logic typically aims at recycling, or recovering, charge that is usually wasted in normal circuits. Since this charge is recycled, Charge Recovery Circuits consume less energy than standard circuits, allowing, for example, a longer battery life.
# ''Aging-Resilient IoT Hardware'': The VLSI group develops automated mitigation techniques that ensure device operation in the toughest environments. Electronics degrade over time and lead to slower operation including failure to operate. By using predictive models with targeted mitigation techniques, electronic devices maintain their operation for longer periods of time.
# ''Energy-Efficient Clock Synchronization for Computing Systems'': The design of clock networks is integral to ensuring fast performance of integrated circuits. The VLSI lab creates automated tools and design methodologies for the synthesis of exa-scale clock networks that require advanced techniques such as Deep Neural Networks. These tools and design methodologies aid in developing novel clocking techniques such as resonant clocking and wireless interconnects.
# ''Hardware and Software Co-Design for Exascale Computing Systems'': With the growth in the number of cores in chip multi-processors (CMP), it is essential to design for scalable communication interconnects. We explore the modeling and design of networks-on-chips (NoCs) as a fabric interconnecting cores in future high-performance chip multi-processors (CMPs).
# ''Communication Infrastructure for Chip-Multi-Processors and 5G IoT systems within Smart Office Spaces'': Wireless communication on-chip are investigated to replace the resource-demanding, conventional, wire-based interconnect networks within integrated circuits. Wireless communication will provide a solution that is highly scalable into the future for the IC communication challenge, as increases in technology scaling and die size dimensions are forecast by the semiconductor industry.

# ''Cyber Physical Design Automation of Smart Homes/Smart Cities'': Through managing energy efficiency and cost-effectiveness. Building an embedded-system based smart CPS platform for power systems. A modern approach in meeting today’s technological need is to use Internet of Things (IoT). Through adaptive exchange of data, hardware equipments are designed to operate autonomously without human supervision. In assistance of our increasing need in electric power, we design this intelligent agent to manage the operation of electric power distribution. In advancement of our understanding in Cyber-Physical System (CPS), we study the physical limit such systems can be designed to delegate.

[http://www.drexel.edu Drexel University]

[http://www.ece.drexel.edu Department of Electrical and Computer Engineering]

[http://maps.google.com/maps?f=q&source=s_q&hl=en&geocode=&q=3141+chestnut+Street+19104&sll=37.649034,-95.712891&sspn=37.558981,49.21875&ie=UTF8&ll=39.963241,-75.181932&spn=0.008948,0.012016&z=14&iwloc=A&amp 3141 Chestnut Street (map) ]

324 Bossone Research Center

Philadelphia, PA 19104

= ''' PhD student Research Assistantship positions are available ''' =

Multiple open positions to be filled in Winter/Spring/Fall 2022. Seeking interest in some (not all) of the following areas:

* VLSI
* computer architecture
* programming
* optimization
* networking
* integrated circuits

Apply through the Drexel University website: [http://drexel.edu/grad/ Drexel Admissions]

----

== [[People]] ==

=== Faculty ===

[[Baris Taskin| Baris Taskin (Biography, CV, Contact)]]

=== Ph.D. students ===

[[Ragh Kuttappa]]

[[Scott Lerner]]

[[Michael Lui]]

[[Nicholas Sica]]

=== Other researchers ===

See [[People]]

== [[Research]] ==



== [[Publications]] ==

== [[Software]] ==

[https://github.com/VANDAL Github]

[[Software#SynchroTrace|SynchroTrace]]


== [[Seminars]] ==

== [[Tutorials]] ==

== [[Teaching]] ==

== [[News/Events]] ==

Nicholas Sica

2021-12-08T20:31:21Z

Njs82:

[[File:Nick.png|175px|thumb|right|Nicholas Sica]]

==Education==
'''Ph.D. in Electrical Engineering, ongoing''' 
:Drexel University, Philadelphia, PA, USA

'''B.S. in Computer Engineering, 2021''' 
:Drexel University, Philadelphia, PA, USA

==Research Interests==
* Phase-based computing
* Adiabatic circuits
* Quantum Computing

==Résumé==
[[media:nick_sica_resume.pdf | Nicholas Sica (December 2021)]]

==Publications==

====Conferences====
#R. Kuttappa, L. Filippini, N. Sica and B. Taskin, "Scalable Resonant Power Clock Generation for Adiabatic Logic Design," 2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2021, pp. 338-342, doi: 10.1109/ISVLSI51109.2021.00068.

==Contact Information==
'''Address:''' 
3141 Chestnut Street 
Drexel University 
ECE Department 
Philadelphia, PA 19104 

'''Office:''' Bossone 405 
'''Email:''' njs82@drexel.edu 
'''Linkedin:''' [https://www.linkedin.com/in/nicholassica/ nicholassica/linkedin]

File:Nick sica resume.pdf

2021-12-08T20:29:34Z

Njs82:

Nicholas Sica

2021-12-08T20:28:18Z

Njs82: Created page with "Nicholas Sica ==Education== '''Ph.D. in Electrical Engineering, ongoing''' :Drexel University, Philadelphia, PA, USA '''B.S. in Com..."

[[File:Nick.png|175px|thumb|right|Nicholas Sica]]

==Education==
'''Ph.D. in Electrical Engineering, ongoing''' 
:Drexel University, Philadelphia, PA, USA

'''B.S. in Computer Engineering, 2021''' 
:Drexel University, Philadelphia, PA, USA

==Research Interests==
* Phase-based computing
* Adiabatic circuits
* Quantum Computing

==Résumé==
[[media:nick_sica_resume.pdf | Nicholas Sica (December 2021)]]

====Conferences====
#R. Kuttappa, L. Filippini, N. Sica and B. Taskin, "Scalable Resonant Power Clock Generation for Adiabatic Logic Design," 2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2021, pp. 338-342, doi: 10.1109/ISVLSI51109.2021.00068.

==Contact Information==
'''Address:''' 
3141 Chestnut Street 
Drexel University 
ECE Department 
Philadelphia, PA 19104 

'''Office:''' Bossone 405 
'''Email:''' njs82@drexel.edu 
'''Linkedin:''' [https://www.linkedin.com/in/nicholassica/ nicholassica/linkedin]

People

2021-12-08T20:22:19Z

Njs82: /* Ph.D. Students */

== Faculty ==
[[Baris Taskin]]

[[Baris Taskin | [Biography, Curriculum Vitae and Contact Info]]]



== Ph.D. Students ==

[[Ragh Kuttappa]]

[[Scott Lerner]]

[[Michael Lui]]

[[Nicholas Sica]]

== MS Students ==



== Group Alumni ==

=== PhD graduates ===

[[Karthik Sangaiah]] (Ph.D. 2020) [First job: AMD Research], Dissertation: "Reimagining the Role of Network-on-Chip Resources Toward Improving Chip Multiprocessor Performance"

[[Vasil Pano]] (Ph.D. 2019) [First job: Post-Doc, Intel], Dissertation: "Wireless Network on Chip for Multi-Die Systems"

[[Leo Filippini]] (Ph.D. 2019) [First job: Voxtel, OR], Dissertation: "Charge Recovery Circuits"

[[Rizwana Begum]] (Ph.D., 2016) [First job: Intel], Dissertation: ''Energy Management of Multi-Component Computing Platforms Under Energy Constraints'' (advisor: Mark Hempstead, Tufts University)

[[Can Sitik]] (Ph.D., 2015) [First job: Intel], Dissertation: ''Design and Automation of Voltage-Scaled Clock Networks''

[[Ying Teng]] (Ph.D., 2014) [First job: Apple], Dissertation: ''Low Power Resonant Rotary Global Clock Distribution Network Design''

[[Ankit More]] (Ph.D., 2013) [First job: Intel], Dissertation: ''Network-on-Chip (NoC) Architectures for Exa-Scale Chip-Multi-Processors (CMPs)''

[[Jianchao Lu]] (Ph.D., 2011), [First job: Synopsys], Dissertation: ''High Performance IC Clock Networks with Grid and Tree Topologies''

[[Vinayak Honkote]] (Ph.D., 2010), [First job: Intel], Dissertation: ''Design Automation and Analysis of Resonant Clocking Technologies''

=== MS graduates ===

Angela Wei (MS, 2021) [First job: SAP] Thesis: "Novel Wireless Non-Uniform Multi-Die Systems"

[[Dongen Bradley Zhou]] (2021)

Steven Khoa (MS, 2020) [First job: There that must not be named] Thesis: "Adiabatic Step-Charging Power-Clock Generator"

Adarsha Balaji (MS, 2018) [Ph.D. at Drexel University]

Isikcan Yilmaz (MS, 2018) [First job: Apple]

Stephen DeLuca (MS, 2015) [First job: Intel]

Julian Kemmerer, (MS 2014) [First job: Susquehanna International Group]

Swetha George (MS 2012) [Ph.D. at the University of Rochester]

Kevin Daly (MS, 2011) [There that must not be named]

[[Sharat C. Shekar]] (MS, 2011) [First job: Samsung Austin Research]

Xiaomi Mao (MS, 2011) [First job: Oracle/Sun]

Yaswanth Simhadri (MS, 2008)

Shannon M. Kurtas (BS/MS, 2007) [First job: Intel], Thesis: ''Statistical Static Timing Analysis of Nonzero Clock Skew Circuits''

=== Visiting graduate students ===

Milene Douarche (2017) [MS student visiting from Grenoble Institute of Technology, France]

Jonghoon Oh (2016) [PhD student visiting from Japan Advanced Institute of Technology, Japan]

Sophie Germain (2015) [MS student visiting from Grenoble Institute of Technology, France]

=== Undergraduate Researchers ===

Malachi Moody (2020) [Delaware State University- NSF REU]}

Eric Zane (2020) [Rowan University - NSF REU]}

Angela Wei (2019) [Drexel]

Steven Khoa (2019) [Drexel]

Albert Emanuel Milani (2019) [Drexel, REU]

Kathrina Waugh (2018) [Drexel STARS scholar]

Rhea Dutta (2018) [Drexel STARS scholar]

Neil Eelman (2018-2019) [Drexel]

Irmak Gezginer (2017) [Middle East Technical University]

Daniel Heuckeroth (2016) [Drexel STARS scholar]

Albert Emanuel Milani (2016) [Drexel STARS scholar]

Nazzareno Farnesi (2016) [Drexel, Drexel STARS scholar]

Brian Hosler (2015-2016) [Drexel]

Eric Leggett, Jr (2015-2016) [Drexel]

Gabrielle Madden (2015) [Drexel STARS scholar]

Isikcan Yilmaz (2015-2016) [Drexel, MS at Drexel]

Eronides Felisberto Da Silva Neto (2015) [Temple]

George Slavin (2015) [Drexel]

Habeeb Olawin (2014) [Drexel STARS scholar]

Fernando Ellis (2013) [RIT - NSF REU]

Daniel Schoepflin (2013) [Drexel STARS scholar]

Giordano Salvador (2013-2014) [Penn - NSF REU, GRFP 2015, PhD at UIUC]

[[Vasil Pano]] (2013-2014) [Drexel, PhD at Drexel]

Andrew Apollonsky (2012) [Cooper Union - NSF REU]

Michael Miller (2012) [Goshen College - NSF REU, GRFP 2015, grad school at CMU]

Michael Sineriz (2012) [Maryland - NSF REU]

[[Scott Lerner ]](2012-2014) [Drexel, GRFP 2015, PhD at Drexel]

Isuru Daulagala (2012) [Drexel]

Catherine Leis (2011) [Drexel, MS at Penn]

Asha Habib (2011) [Bryn Mawr College - NSF REU]

Kevin Linger (2011) [University of Virginia - NSF REU]

Andrew Richard Benton (2011) [Drexel STARS scholar]

David Hocky (2011) [Drexel STARS scholar]

Yusuf Aksehir (2010) [Sabanci University]

Abdalla Musmar (2010) [An-Najah National University - NSF REU, graduate school at CMU]

Michael Edoror (2010) [University of Maryland - NSF REU]

Bo Hyun Kim (2010) [Carnegie Mellon University, graduate school at Columbia University]

S. Kutal Gokce (2008) [Middle East Technical University (METU), M.S. at Koc University, Ph.D. at U of Texas-Austin]

Can Hankendi (2008) [Sabanci University, M.S. at USC, Ph.D. at Boston University]

Danh Nguyen (2007) [Ph.D. at Drexel University]

*Director of REU Site: Computing for Power and Energy (2010-2013) http://reu.ece.drexel.edu



=== High-School Researchers ===

Ioannis A. Savidis (2019) [Undergraduate at Drexel University]

Edison Kim (2016) [Undergraduate at Temple University]

Ilteris K. Canberk (2010) [Robert College, undergraduate at Carnegie Mellon University]