VLSILab - User contributions [en]

Ying Teng

2013-02-26T14:59:05Z

Ying:

==Education==
'''Ph.D. in Computer Engineering, 2009-Present''' 
:Drexel University, Philadelphia, Pennsylvania, USA

'''M.S. in Computer Engineering, 2007 ''' 
:Tianjin University, Tianjin, China

'''B.S. in Electrical and Computer Engineering, 2004''' 
:Tianjin University, Tianjin, China.

==Research Interests==
* Resonant Adiabatic Clocking
* Adiabatic Circuit Design
* Physical Design in general including Floorplanning, Placement and Routing
* Digital, Analog and Mixed Signal Integrated Circuits

== Selected Publications ==
# Y. Teng and B. Taskin, "Rotary Traveling Wave Oscillator Frequency Division at Nanoscale Technologies", to appear in the ''Proceedings of IEEE Great Lakes Symposium on VLSI (GLSVLSI)'', May 2013.
# Y. Teng and B. Taskin, "Sparse-Rotary Oscillator Array (SROA) Design for Power and Skew Reduction", to appear in the ''Proceedings of IEEE Design Automation and Test in Europe (DATE)'', March 2013.
# Y. Teng and B. Taskin, "Clock Mesh Synthesis Method using the Earth Mover’s Distance under Transformations", ''Proceedings of the IEEE International Conference on Computer Design (ICCD)'', Oct. 2012, pp.121--126.
# Y. Teng and B. Taskin, "Synchronization Scheme for Brick-based Rotary Oscillator Arrays", ''Proceedings of IEEE Great Lakes Symposium on VLSI (GLSVLSI)'', May 2012.
# Y. Teng, J. Lu and B. Taskin, "ROA-brick Topology for Rotary Resonant Clocks", ''Proceedings of the IEEE International Conference on Computer Design (ICCD)'', Oct. 2011, pp.273--278.
# J. Lu, Y. Teng and B. Taskin, "A Reconfigurable Clock Polarity Assignment Flow for Clock Gated Designs", ''IEEE Transactions on Very Large Scale Integration Systems (TVLSI)''.
# Y. Teng and B. Taskin, “Process Variation Sensitivity of the Rotary Traveling Wave Oscillator”, ''Proceedings of the IEEE International Symposium on Quality Electronic Design (ISQED)'', March 2011.
# Y. Teng and B. Taskin, “Look-up Table Based Low Power Rotary Travelling Wave Oscillator Design Considering the Skin Effect”, ''Journal of Low Power Electronics (JOLPE)'' [featured on the cover page].
# V. Honkote, A. More, Y. Teng, J. Lu and B. Taskin, "Interconnect Modeling, Synchronization and Power Analysis for Custom Rotary Rings", to appear in the ''Proceedings of the International Conference on VLSI Design (VLSID)'', January 2011.

==Contact Information==
'''Address:''' 
3141 Chestnut Street 
Department of ECE 
Drexel University 
Bossone 324 
Philadelphia 
Pennsylvania 19104 

'''Phone:''' (302) 690-1775 
'''Fax:''' (215) 895-1695 
'''Email: '''yt74@drexel.edu

Ying Teng

2013-02-26T14:56:31Z

Ying:

==Education==
'''Ph.D. in Computer Engineering, 2009-Present''' 
:Drexel University, Philadelphia, Pennsylvania, USA

'''M.S. in Computer Engineering, 2007 ''' 
:Tianjin University, Tianjin, China

'''B.S. in Electrical and Computer Engineering, 2004''' 
:Tianjin University, Tianjin, China.

==Research Interests==
* Resonant Adiabatic Clocking
* Adiabatic Circuit Design
* Physical Design in general including Floorplanning, Placement and Routing
* Digital, Analog and Mixed Signal Integrated Circuits

== Selected Publications ==
# Y. Teng and B. Taskin, "Rotary Traveling Wave Oscillator Frequency Division at Nanoscale Technologies", to appear in the ''Proceedings of IEEE Great Lakes Symposium on VLSI (GLSVLSI)'', May 2013.
# Y. Teng and B. Taskin, "Sparse-Rotary Oscillator Array (SROA) Design for Power and Skew Reduction", to appear in the ''Proceedings of IEEE Design Automation and Test in Europe (DATE)'', March 2013.
# Y. Teng and B. Taskin, "Synchronization Scheme for Brick-based Rotary Oscillator Arrays", ''Proceedings of IEEE Great Lakes Symposium on VLSI (GLSVLSI)'', May 2012.
# Y. Teng, J. Lu and B.Taskin, "ROA-brick Topology for Rotary Resonant Clocks", ''Proceedings of the IEEE International Conference on Computer Design (ICCD)'', Oct. 2011, pp.273--278.
# J. Lu, Y. Teng and B. Taskin, "A Reconfigurable Clock Polarity Assignment Flow for Clock Gated Designs", ''IEEE Transactions on Very Large Scale Integration Systems (TVLSI)''.
# Y. Teng and B. Taskin, “Process Variation Sensitivity of the Rotary Traveling Wave Oscillator”, ''Proceedings of the IEEE International Symposium on Quality Electronic Design (ISQED)'', March 2011.
# Y. Teng and B. Taskin, “Look-up Table Based Low Power Rotary Travelling Wave Oscillator Design Considering the Skin Effect”, ''Journal of Low Power Electronics (JOLPE)'' [featured on the cover page].
# V. Honkote, A. More, Y. Teng, J. Lu and B. Taskin, "Interconnect Modeling, Synchronization and Power Analysis for Custom Rotary Rings", to appear in the ''Proceedings of the International Conference on VLSI Design (VLSID)'', January 2011.

==Contact Information==
'''Address:''' 
3141 Chestnut Street 
Department of ECE 
Drexel University 
Bossone 324 
Philadelphia 
Pennsylvania 19104 

'''Phone:''' (302) 690-1775 
'''Fax:''' (215) 895-1695 
'''Email: '''yt74@drexel.edu

Ying Teng

2012-03-11T21:30:06Z

Ying:

==Education==
'''Ph.D. in Computer Engineering, 2009-Present''' 
:Drexel University, Philadelphia, Pennsylvania, USA

'''M.S. in Computer Engineering, 2007 ''' 
:Tianjin University, Tianjin, China

'''B.S. in Electrical and Computer Engineering, 2004''' 
:Tianjin University, Tianjin, China.

==Research Interests==
* Resonant Adiabatic Clocking
* Adiabatic Circuit Design
* Physical Design in general including Floorplanning, Placement and Routing
* Digital, Analog and Mixed Signal Integrated Circuits

== Selected Publications ==
# Y. Teng and B. Taskin, "Synchronization Scheme for Brick-based Rotary Oscillator Arrays", to appear in the ''Proceedings of IEEE Great Lakes Symposium on VLSI (GLSVLSI)'', May 2012.
# Y. Teng, J. Lu and B.Taskin, "ROA-brick Topology for Rotary Resonant Clocks", ''Proceedings of the IEEE International Conference on Computer Design (ICCD)'', Oct. 2011, pp.273--278.
# J. Lu, Y. Teng and B. Taskin, "A Reconfigurable Clock Polarity Assignment Flow for Clock Gated Designs", ''IEEE Transactions on Very Large Scale Integration Systems (TVLSI)''.
# Y. Teng and B. Taskin, “Process Variation Sensitivity of the Rotary Traveling Wave Oscillator”, ''Proceedings of the IEEE International Symposium on Quality Electronic Design (ISQED)'', March 2011.
# Y. Teng and B. Taskin, “Look-up Table Based Low Power Rotary Travelling Wave Oscillator Design Considering the Skin Effect”, ''Journal of Low Power Electronics (JOLPE)'' [featured on the cover page].
# V. Honkote, A. More, Y. Teng, J. Lu and B. Taskin, "Interconnect Modeling, Synchronization and Power Analysis for Custom Rotary Rings", to appear in the ''Proceedings of the International Conference on VLSI Design (VLSID)'', January 2011.

==Contact Information==
'''Address:''' 
3141 Chestnut Street 
Department of ECE 
Drexel University 
Bossone 324 
Philadelphia 
Pennsylvania 19104 

'''Phone:''' (302) 690-1775 
'''Fax:''' (215) 895-1695 
'''Email: '''yt74@drexel.edu

Ying Teng

2012-03-11T21:29:11Z

Ying:

==Education==
'''Ph.D. in Computer Engineering, 2009-Present''' 
:Drexel University, Philadelphia, Pennsylvania, USA

'''M.S. in Computer Engineering, 2007 ''' 
:Tianjin University, Tianjin, China

'''B.S. in Electrical and Computer Engineering, 2004''' 
:Tianjin University, Tianjin, China.

==Research Interests==
* Resonant Adiabatic Clocking
* Adiabatic Circuit Design
* Physical Design in general including Floorplanning, Placement and Routing
* Digital, Analog and Mixed Signal Integrated Circuits

== Selected Publications ==
# Y. Teng and B. Taskin, "Synchronization Scheme for Brick-based Rotary Oscillator Arrays", to appear in the ''Proceedings of IEEE Great Lakes Symposium on VLSI (GLSVLSI)'', May 2012.
# Y. Teng, J. Lu and B.Taskin, "ROA-brick Topology for Rotary Resonant Clocks", ''Proceedings of the IEEE International Conference on Computer Design (ICCD)'', Oct. 2011, pp.273--278.
# Jianchao Lu, Ying Teng and Baris Taskin, "A Reconfigurable Clock Polarity Assignment Flow for Clock Gated Designs", ''IEEE Transactions on Very Large Scale Integration Systems (TVLSI)''.
# Y. Teng and B. Taskin, “Process Variation Sensitivity of the Rotary Traveling Wave Oscillator”, ''Proceedings of the IEEE International Symposium on Quality Electronic Design (ISQED)'', March 2011.
# Y. Teng and B. Taskin, “Look-up Table Based Low Power Rotary Travelling Wave Oscillator Design Considering the Skin Effect”, ''Journal of Low Power Electronics (JOLPE)'' [featured on the cover page].
# Vinayak Honkote, Ankit More, Ying Teng, Jianchao Lu and Baris Taskin, "Interconnect Modeling, Synchronization and Power Analysis for Custom Rotary Rings", to appear in the ''Proceedings of the International Conference on VLSI Design (VLSID)'', January 2011.

==Contact Information==
'''Address:''' 
3141 Chestnut Street 
Department of ECE 
Drexel University 
Bossone 324 
Philadelphia 
Pennsylvania 19104 

'''Phone:''' (302) 690-1775 
'''Fax:''' (215) 895-1695 
'''Email: '''yt74@drexel.edu

Ying Teng

2012-03-11T21:28:19Z

Ying:

==Education==
'''Ph.D. in Computer Engineering, 2009-Present''' 
:Drexel University, Philadelphia, Pennsylvania, USA

'''M.S. in Computer Engineering, 2007 ''' 
:Tianjin University, Tianjin, China

'''B.S. in Electrical and Computer Engineering, 2004''' 
:Tianjin University, Tianjin, China.

==Research Interests==
* Resonant Adiabatic Clocking
* Adiabatic Circuit Design
* Physical Design in general including Floorplanning, Placement and Routing
* Digital, Analog and Mixed Signal Integrated Circuits

== Selected Publications ==
# Y. Teng and B. Taskin, "Synchronization Scheme for Brick-based Rotary Oscillator Arrays", to appear in the ''Proceedings of IEEE Great Lakes Symposium on VLSI (GLSVLSI)", May 2012.
# Y. Teng, J. Lu and B.Taskin, "ROA-brick Topology for Rotary Resonant Clocks", ''Proceedings of the IEEE International Conference on Computer Design (ICCD)'', Oct. 2011, pp.273--278.
# Jianchao Lu, Ying Teng and Baris Taskin, "A Reconfigurable Clock Polarity Assignment Flow for Clock Gated Designs", ''IEEE Transactions on Very Large Scale Integration Systems (TVLSI)''.
# Y. Teng and B. Taskin, “Process Variation Sensitivity of the Rotary Traveling Wave Oscillator”, ''Proceedings of the IEEE International Symposium on Quality Electronic Design (ISQED)'', March 2011.
# Y. Teng and B. Taskin, “Look-up Table Based Low Power Rotary Travelling Wave Oscillator Design Considering the Skin Effect”, ''Journal of Low Power Electronics (JOLPE)'' [featured on the cover page].
# Vinayak Honkote, Ankit More, Ying Teng, Jianchao Lu and Baris Taskin, "Interconnect Modeling, Synchronization and Power Analysis for Custom Rotary Rings", to appear in the ''Proceedings of the International Conference on VLSI Design (VLSID)'', January 2011.

==Contact Information==
'''Address:''' 
3141 Chestnut Street 
Department of ECE 
Drexel University 
Bossone 324 
Philadelphia 
Pennsylvania 19104 

'''Phone:''' (302) 690-1775 
'''Fax:''' (215) 895-1695 
'''Email: '''yt74@drexel.edu

Ying Teng

2012-03-11T21:23:55Z

Ying:

Ying Teng

2010-12-06T20:41:47Z

Ying:

Ying Teng

2010-12-06T16:33:08Z

Ying:

Ying Teng

2010-12-06T16:28:52Z

Ying:

==Education==
'''Ph.D. in Computer Engineering, 2009-Present''' 
:Drexel University, Philadelphia, Pennsylvania, USA

'''M.S. in Computer Engineering, 2007 ''' 
:Tianjin University, Tianjin, China

'''B.S. in Electrical and Computer Engineering, 2004''' 
:Tianjin University, Tianjin, China.

==Research Interests==
* Resonant Adiabatic Clocking
* Adiabatic Circuit Design
* Physical Design in general including Floorplanning, Placement and Routing
* Digital, Analog and Mixed Signal Integrated Circuits

== Selected Publications ==
# Jianchao Lu, Xiaomi Mao and Baris Taskin, "Timing Slack Aware Incremental Register Placement with Non-uniform Grid Generation for Clock Mesh Synthesis", to appear in the ''Proceedings of the ACM International Symposium on Physical Design (ISPD)'', March 2011.
# Jianchao Lu, Vinayak Honkote, Xin Chen and Baris Taskin, "Steiner Tree Based Rotary Clock Routing with Bounded Skew and Capacitive Load Balancing", to appear in the ''Proceedings of the Design, Automation and Test in Europe (DATE)'', March 2011.
# Vinayak Honkote, Ankit More, Ying Teng, Jianchao Lu and Baris Taskin, "Interconnect Modeling, Synchronization and Power Analysis for Custom Rotary Rings", to appear in the ''Proceedings of the International Conference on VLSI Design (VLSID)'', January 2011.
# Jianchao Lu and Baris Taskin, "Clock Tree Synthesis with XOR Gates for Polarity Assignment", ''Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI)'', July 2010.
# Jianchao Lu and Baris Taskin, "Clock Buffer Polarity Assignment Considering Capacitive Load", ''Proceedings of the IEEE International Symposium on Quality Electronic Design (ISQED)'', March 2010, pp. 765--770.
# Jianchao Lu and Baris Taskin, "Incremental Register Placement for Low Power CTS", ''Proceedings of the IEEE International SoC Design Conference (ISOCC)'', November 2009, pp.232--236.
# Jianchao Lu and Baris Taskin, "Post-CTS Clock Skew Scheduling with Limited Delay Buffering", ''Proceedings of the IEEE International Conference on Midwest Circuits and Systems (MWSCAS)'', August 2009, pp. 224--227.
# Baris Taskin and Jianchao Lu, "Post-CTS Delay Insertion to Fix Timing Violations", ''Proceedings of the IEEE International Conference on Midwest Circuits and Systems (MWSCAS)'', August 2008, pp. 81--84.

==Contact Information==
'''Address:''' 
3141 Chestnut Street 
Department of ECE 
Drexel University 
Bossone 324 
Philadelphia 
Pennsylvania 19104 

'''Phone:''' (215) 301-8795 
'''Fax:''' (215) 895-1695 
'''Email: '''jl597@drexel.edu

Ying Teng

2010-12-06T16:24:53Z

Ying: Created page with '==Education== '''Ph.D. in Computer Engineering, 2009-Present''' :Drexel University, Philadelphia, Pennsylvania, USA '''M.S. in Computer Engineering, 2007 ''' :Tianji...'

==Education==
'''Ph.D. in Computer Engineering, 2009-Present''' 
:Drexel University, Philadelphia, Pennsylvania, USA

'''M.S. in Computer Engineering, 2007 ''' 
:Tianjin University, Tianjin, China

'''B.S. in Electrical and Computer Engineering, 2004''' 
:Tianjin University, Tianjin, China.

==Research Interests==
* Clock Network Synthesis including Clock Tree/Mesh Synthesis and Resonant Clocking
* Physical Design in general including Floorplanning, Placement and Routing
* Clock Skew Optimization
* Static and Statistical Timing analysis
* Parallel Computing

==Curriculum Vitae==
[http://ece.drexel.edu/faculty/taskin/wiki/vlsilab/images/5/51/Jlu_cv_v2.pdf CV (Nov 2010)]

== Selected Publications ==
# Jianchao Lu, Xiaomi Mao and Baris Taskin, "Timing Slack Aware Incremental Register Placement with Non-uniform Grid Generation for Clock Mesh Synthesis", to appear in the ''Proceedings of the ACM International Symposium on Physical Design (ISPD)'', March 2011.
# Jianchao Lu, Vinayak Honkote, Xin Chen and Baris Taskin, "Steiner Tree Based Rotary Clock Routing with Bounded Skew and Capacitive Load Balancing", to appear in the ''Proceedings of the Design, Automation and Test in Europe (DATE)'', March 2011.
# Vinayak Honkote, Ankit More, Ying Teng, Jianchao Lu and Baris Taskin, "Interconnect Modeling, Synchronization and Power Analysis for Custom Rotary Rings", to appear in the ''Proceedings of the International Conference on VLSI Design (VLSID)'', January 2011.
# Jianchao Lu and Baris Taskin, "Clock Tree Synthesis with XOR Gates for Polarity Assignment", ''Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI)'', July 2010.
# Jianchao Lu and Baris Taskin, "Clock Buffer Polarity Assignment Considering Capacitive Load", ''Proceedings of the IEEE International Symposium on Quality Electronic Design (ISQED)'', March 2010, pp. 765--770.
# Jianchao Lu and Baris Taskin, "Incremental Register Placement for Low Power CTS", ''Proceedings of the IEEE International SoC Design Conference (ISOCC)'', November 2009, pp.232--236.
# Jianchao Lu and Baris Taskin, "Post-CTS Clock Skew Scheduling with Limited Delay Buffering", ''Proceedings of the IEEE International Conference on Midwest Circuits and Systems (MWSCAS)'', August 2009, pp. 224--227.
# Baris Taskin and Jianchao Lu, "Post-CTS Delay Insertion to Fix Timing Violations", ''Proceedings of the IEEE International Conference on Midwest Circuits and Systems (MWSCAS)'', August 2008, pp. 81--84.

==Contact Information==
'''Address:''' 
3141 Chestnut Street 
Department of ECE 
Drexel University 
Bossone 324 
Philadelphia 
Pennsylvania 19104 

'''Phone:''' (215) 301-8795 
'''Fax:''' (215) 895-1695 
'''Email: '''jl597@drexel.edu

News/Events

2010-06-24T14:18:17Z

Ying:

* The NSF-funded REU Site opportunity on "Computing for Power and Energy" directed by Dr. Taskin is starting in Summer 2010: [http://reu.ece.drexel.edu REU Site on Computing for Power and Energy: The Old, The New and The Renewable]. This site will run for the next three years.
<gallery>
File:DrexelREU2010web.jpg
</gallery>

* Jianchao and Ying presented their work in University Booth, at the ACM/IEEE Design Automation Conference in Anaheim, CA, in 2010.
<gallery>
File:Jianchao_2010_dac.JPG
File:Ying_2010_dac.JPG
</gallery>

* Jianchao and Vinayak presented their work in University Booth and Ph.D. Forum, respectively, at the ACM/IEEE Design Automation Conference in San Francisco, CA, in 2009.
<gallery>
File:dac2009_jianchao.jpg
File:dac2009_vinayak.jpg
</gallery>

* Jianchao and Vinayak participated in the SIGDA CADAthlon at ICCAD 2008 in San Jose, CA.
<gallery>
File:cadathlon080.jpg
File:cadathlon081.jpg
File:cadathlon082.jpg
</gallery>

* Accepting the ''A. Richard Newton Award'' at the ACM/IEEE Design Automation Conference in 2007.
<gallery>
File:dac2007.jpg
File:dac20071.jpg
</gallery>

* Drexel Senior Design team, also winners of the CE award, presented at the University Booth at the ACM/IEEE Design Automation Conference in San Diego, CA, in 2007.
<gallery>
File:senior07.jpg
File:senior071.jpg
File:senior072.jpg
</gallery>

News/Events

2010-06-24T14:17:12Z

Ying:

* The NSF-funded REU Site opportunity on "Computing for Power and Energy" directed by Dr. Taskin is starting in Summer 2010: [http://reu.ece.drexel.edu REU Site on Computing for Power and Energy: The Old, The New and The Renewable]. This site will run for the next three years.
<gallery>
File:DrexelREU2010web.jpg
</gallery>

* Jianchao and Ying presented their work in University Booth, at the ACM/IEEE Design Automation Conference in Anaheim, CA, in 2010.
<gallery>
File:Jianchao 2010 dac.jpg
File:Ying 2010 dac.jpg
</gallery>

* Jianchao and Vinayak presented their work in University Booth and Ph.D. Forum, respectively, at the ACM/IEEE Design Automation Conference in San Francisco, CA, in 2009.
<gallery>
File:dac2009_jianchao.jpg
File:dac2009_vinayak.jpg
</gallery>

* Jianchao and Vinayak participated in the SIGDA CADAthlon at ICCAD 2008 in San Jose, CA.
<gallery>
File:cadathlon080.jpg
File:cadathlon081.jpg
File:cadathlon082.jpg
</gallery>

* Accepting the ''A. Richard Newton Award'' at the ACM/IEEE Design Automation Conference in 2007.
<gallery>
File:dac2007.jpg
File:dac20071.jpg
</gallery>

* Drexel Senior Design team, also winners of the CE award, presented at the University Booth at the ACM/IEEE Design Automation Conference in San Diego, CA, in 2007.
<gallery>
File:senior07.jpg
File:senior071.jpg
File:senior072.jpg
</gallery>

News/Events

2010-06-24T14:15:16Z

Ying:

* The NSF-funded REU Site opportunity on "Computing for Power and Energy" directed by Dr. Taskin is starting in Summer 2010: [http://reu.ece.drexel.edu REU Site on Computing for Power and Energy: The Old, The New and The Renewable]. This site will run for the next three years.
<gallery>
File:DrexelREU2010web.jpg
</gallery>

* Jianchao and Ying presented their work in University Booth, at the ACM/IEEE Design Automation Conference in Anaheim, CA, in 2010.
<gallery>
File:Jianchao_2010_dac.jpg
File:Ying_2010_dac.jpg
</gallery>

* Jianchao and Vinayak presented their work in University Booth and Ph.D. Forum, respectively, at the ACM/IEEE Design Automation Conference in San Francisco, CA, in 2009.
<gallery>
File:dac2009_jianchao.jpg
File:dac2009_vinayak.jpg
</gallery>

* Jianchao and Vinayak participated in the SIGDA CADAthlon at ICCAD 2008 in San Jose, CA.
<gallery>
File:cadathlon080.jpg
File:cadathlon081.jpg
File:cadathlon082.jpg
</gallery>

* Accepting the ''A. Richard Newton Award'' at the ACM/IEEE Design Automation Conference in 2007.
<gallery>
File:dac2007.jpg
File:dac20071.jpg
</gallery>

* Drexel Senior Design team, also winners of the CE award, presented at the University Booth at the ACM/IEEE Design Automation Conference in San Diego, CA, in 2007.
<gallery>
File:senior07.jpg
File:senior071.jpg
File:senior072.jpg
</gallery>

News/Events

2010-06-24T14:13:58Z

Ying:

* The NSF-funded REU Site opportunity on "Computing for Power and Energy" directed by Dr. Taskin is starting in Summer 2010: [http://reu.ece.drexel.edu REU Site on Computing for Power and Energy: The Old, The New and The Renewable]. This site will run for the next three years.
<gallery>
File:DrexelREU2010web.jpg
</gallery>

* Jianchao and Ying presented their work in University Booth, at the ACM/IEEE Design Automation Conference in Anaheim, CA, in 2010.
<gallery>
File:jianchao_2010_dac.jpg
File:ying_2010_dac.jpg
</gallery>

* Jianchao and Vinayak presented their work in University Booth and Ph.D. Forum, respectively, at the ACM/IEEE Design Automation Conference in San Francisco, CA, in 2009.
<gallery>
File:dac2009_jianchao.jpg
File:dac2009_vinayak.jpg
</gallery>

* Jianchao and Vinayak participated in the SIGDA CADAthlon at ICCAD 2008 in San Jose, CA.
<gallery>
File:cadathlon080.jpg
File:cadathlon081.jpg
File:cadathlon082.jpg
</gallery>

* Accepting the ''A. Richard Newton Award'' at the ACM/IEEE Design Automation Conference in 2007.
<gallery>
File:dac2007.jpg
File:dac20071.jpg
</gallery>

* Drexel Senior Design team, also winners of the CE award, presented at the University Booth at the ACM/IEEE Design Automation Conference in San Diego, CA, in 2007.
<gallery>
File:senior07.jpg
File:senior071.jpg
File:senior072.jpg
</gallery>

File:Ying 2010 dac.JPG

2010-06-24T14:12:49Z

Ying:

File:Jianchao 2010 dac.JPG

2010-06-24T14:12:06Z

Ying: dac 2010

dac 2010

News/Events

2010-06-24T14:09:07Z

Ying:

* The NSF-funded REU Site opportunity on "Computing for Power and Energy" directed by Dr. Taskin is starting in Summer 2010: [http://reu.ece.drexel.edu REU Site on Computing for Power and Energy: The Old, The New and The Renewable]. This site will run for the next three years.
<gallery>
File:DrexelREU2010web.jpg
</gallery>

* Jianchao and Ying presented their work in University Booth, at the ACM/IEEE Design Automation Conference in Anaheim, CA, in 2010.
<gallery>
File:dac2009_jianchao.jpg
File:dac2009_vinayak.jpg
</gallery>

* Jianchao and Vinayak presented their work in University Booth and Ph.D. Forum, respectively, at the ACM/IEEE Design Automation Conference in San Francisco, CA, in 2009.
<gallery>
File:dac2009_jianchao.jpg
File:dac2009_vinayak.jpg
</gallery>

* Jianchao and Vinayak participated in the SIGDA CADAthlon at ICCAD 2008 in San Jose, CA.
<gallery>
File:cadathlon080.jpg
File:cadathlon081.jpg
File:cadathlon082.jpg
</gallery>

* Accepting the ''A. Richard Newton Award'' at the ACM/IEEE Design Automation Conference in 2007.
<gallery>
File:dac2007.jpg
File:dac20071.jpg
</gallery>

* Drexel Senior Design team, also winners of the CE award, presented at the University Booth at the ACM/IEEE Design Automation Conference in San Diego, CA, in 2007.
<gallery>
File:senior07.jpg
File:senior071.jpg
File:senior072.jpg
</gallery>