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- [http://ece.drexel.edu/faculty/taskin/wiki/vlsilab/images/f/fd/Vinayak_CV.pdf Vinayak CV] '''Email:''' vinayak.honkote@gmail.com2 KB (214 words) - 00:26, 12 January 2013
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- # Vinayak Honkote, Ankit More and Baris Taskin, "3-D Parasitic Modeling for Rotary In # Vinayak Honkote, Ankit More, Ying Teng, Jianchao Lu and Baris Taskin, "Interconnect4 KB (555 words) - 22:21, 18 December 2015
- [http://ece.drexel.edu/faculty/taskin/wiki/vlsilab/images/f/fd/Vinayak_CV.pdf Vinayak CV] '''Email:''' vinayak.honkote@gmail.com2 KB (214 words) - 00:26, 12 January 2013
- # Jianchao Lu, Vinayak Honkote, Xin Chen and Baris Taskin, "Steiner Tree Based Rotary Clock Routin # Vinayak Honkote, Ankit More, Ying Teng, Jianchao Lu and Baris Taskin, "Interconnect5 KB (675 words) - 21:15, 8 November 2012
- ...locking" with Prof. Matthew Guthaus of UCSC and Drexel VLSI Lab Alumni Dr. Vinayak Honkote of Intel at the IEEE/ACM International Conference on Computer-Aided * Vinayak received the first N. Bilgutay fellowship from the Department of Electrical11 KB (1,499 words) - 21:54, 2 March 2021
- Vinayak Honkote, Ph.D., Ragh Kuttappa, Intel, OR (co-authors on research products) * Nicholas Sica, Ragh Kuttappa, Vinayak Honkote, Baris Taskin, "High Speed Phase-Based Computing", Proceedings of t8 KB (1,112 words) - 08:44, 15 October 2024
- #Nicholas Sica, Ragh Kuttappa, Vinayak Honkote, Baris Taskin, "High Speed Phase-Based Computing", ''Proceedings of #Ragh Kuttappa, Baris Taskin, Vinayak Honkote, Satish Yada, Jainaveen Sundaram, Dileep Kurian, Tanay Karnik, and44 KB (5,814 words) - 16:31, 10 July 2024
- [[Vinayak Honkote]] (Ph.D., 2010), [First job: Intel], Dissertation: ''Design Automat6 KB (811 words) - 16:49, 10 July 2024
- Ph.D. Student(s): [[Ragh Kuttappa]], [[Ying Teng]] (graduated), [[Vinayak Honkote]] (graduated), [[Ankit More]] (graduated), [[Jianchao Lu]] (graduat15 KB (2,176 words) - 08:37, 15 October 2024
