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  • [http://ece.drexel.edu/faculty/taskin/wiki/vlsilab/images/f/fd/Vinayak_CV.pdf Vinayak CV] '''Email:''' vinayak.honkote@gmail.com
    2 KB (214 words) - 01:26, 12 January 2013

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  • # Vinayak Honkote, Ankit More and Baris Taskin, "3-D Parasitic Modeling for Rotary In # Vinayak Honkote, Ankit More, Ying Teng, Jianchao Lu and Baris Taskin, "Interconnect
    4 KB (555 words) - 23:21, 18 December 2015
  • [http://ece.drexel.edu/faculty/taskin/wiki/vlsilab/images/f/fd/Vinayak_CV.pdf Vinayak CV] '''Email:''' vinayak.honkote@gmail.com
    2 KB (214 words) - 01:26, 12 January 2013
  • # Jianchao Lu, Vinayak Honkote, Xin Chen and Baris Taskin, "Steiner Tree Based Rotary Clock Routin # Vinayak Honkote, Ankit More, Ying Teng, Jianchao Lu and Baris Taskin, "Interconnect
    5 KB (675 words) - 22:15, 8 November 2012
  • ...locking" with Prof. Matthew Guthaus of UCSC and Drexel VLSI Lab Alumni Dr. Vinayak Honkote of Intel at the IEEE/ACM International Conference on Computer-Aided * Vinayak received the first N. Bilgutay fellowship from the Department of Electrical
    11 KB (1,499 words) - 22:54, 2 March 2021
  • #Nicholas Sica, Ragh Kuttappa, Vinayak Honkote, Baris Taskin, "High Speed Phase-Based Computing", ''Proceedings of #Ragh Kuttappa, Baris Taskin, Vinayak Honkote, Satish Yada, Jainaveen Sundaram, Dileep Kurian, Tanay Karnik, and
    43 KB (5,776 words) - 11:33, 7 March 2024
  • [[Vinayak Honkote]] (Ph.D., 2010), [First job: Intel], Dissertation: ''Design Automat
    6 KB (787 words) - 19:34, 20 October 2023
  • Ph.D. Student(s): [[Ragh Kuttappa]], [[Ying Teng]] (graduated), [[Vinayak Honkote]] (graduated), [[Ankit More]] (graduated), [[Jianchao Lu]] (graduat
    15 KB (2,173 words) - 10:15, 20 October 2022