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[[Karthik Sangaiah]] | [[Karthik Sangaiah]] | ||
=== Other researchers === | === Other researchers === | ||
Revision as of 11:35, 12 January 2016
Drexel VLSI and Architecture Laboratory (http://vlsi.ece.drexel.edu)
Department of Electrical and Computer Engineering
324 Bossone Research Center
Philadelphia, PA 19104
People
Faculty
Ph.D. students
Ragh Kuttappa
Other researchers
See People
Research
Design and Automation of Low Swing Clocking
Wireless On-Chip Interconnects
Ultra Low-Power Adiabatic Circuit Design
