Software: Difference between revisions
From VLSILab
Jump to navigationJump to search
No edit summary |
No edit summary |
||
| Line 1: | Line 1: | ||
== SynchroTrace== | == SynchroTrace== | ||
SynchroTrace is a two-step trace-driven simulation methodology that enables efficient design space exploration of computing units (CMPs, MPSoCs, HPC, etc.). | |||
SynchroTrace | For details see: [[SynchroTrace]] | ||
== SLECTS == | == SLECTS == | ||
Implementing a slew-driven clock tree synthesis methodology. | |||
For details see: [[SLECTS]] | |||
== Rotary Resonant Clock Synthesizer== | == Rotary Resonant Clock Synthesizer== | ||
A rotary resonant clock synthesizer in Cadence. | |||
For details see: [[RotarySynthesizer]] | |||
Revision as of 08:29, 30 January 2016
SynchroTrace
SynchroTrace is a two-step trace-driven simulation methodology that enables efficient design space exploration of computing units (CMPs, MPSoCs, HPC, etc.).
For details see: SynchroTrace
SLECTS
Implementing a slew-driven clock tree synthesis methodology.
For details see: SLECTS
Rotary Resonant Clock Synthesizer
A rotary resonant clock synthesizer in Cadence.
For details see: RotarySynthesizer
