Software: Difference between revisions
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[https://github.com/VANDAL/prism git.io/prism] | [https://github.com/VANDAL/prism git.io/prism] | ||
Prism is a super-cool™ framework for | Prism is a super-cool™ framework for easy analysis of applications. | ||
If you want to easily look at memory operations, function traces, IOPs/FLOPs, et al, check out Prism. | If you want to easily look at memory operations, function traces, IOPs/FLOPs, et al in an executed program, then check out Prism. | ||
We have used it internally for workload-guided EDA tool flows, on-chip routing, thread-mapping, and in the design of architectural simulators. | We have used it internally for workload-guided EDA tool flows, on-chip routing, thread-mapping, and in the design of architectural simulators. | ||
Revision as of 12:55, 11 March 2018
GitHUB page
Drexel VANDAL GitHub: https://github.com/VANDAL
SynchroTrace
SynchroTrace is a two-step trace-driven simulation methodology that enables efficient design space exploration of computing units (CMPs, MPSoCs, HPC, etc.).
For details and download information see: SynchroTrace
Prism
Prism is a super-cool™ framework for easy analysis of applications. If you want to easily look at memory operations, function traces, IOPs/FLOPs, et al in an executed program, then check out Prism.
We have used it internally for workload-guided EDA tool flows, on-chip routing, thread-mapping, and in the design of architectural simulators.
SLECTS
Implementing a slew-driven clock tree synthesis methodology.
For details see: SLECTS
Rotary Resonant Clock Synthesizer
A rotary resonant clock synthesizer in Cadence.
For details see: RotaSyn
