Sharat C. Shekar: Difference between revisions
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[[File:Sharat_image.png|right|border|frame|[[Sharat C Shekar]]|25px]] | [[File:Sharat_image.png|right|border|frame|[[Sharat C Shekar]]|25px]] | ||
==Education== | ==Education== | ||
'''M.S. in Computer Engineering, 2009- | '''M.S. in Computer Engineering, 2009-2011''' <br> | ||
:Drexel University, Philadelphia, Pennsylvania, USA | :Drexel University, Philadelphia, Pennsylvania, USA | ||
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==Curriculum Vitae== | ==Curriculum Vitae== | ||
[http:// | [http://www.linkedin.com/pub/sharat-chandra-shekar/b/12/32b Sharat C Shekar CV (Feb 2011)] | ||
== Selected Publications == | == Selected Publications == | ||
# Sharat Shekar and Michael Bowen, "Early Time-Based Block Specific Power Analysis Methodology Using PrimeTimePX", to appear in the ''Proceedings of Synopsys User Guide Conference San Jose(SNUG)'', March 2011. | # Sharat Shekar and Michael Bowen, "Early Time-Based Block Specific Power Analysis Methodology Using PrimeTimePX", to appear in the ''Proceedings of Synopsys User Guide Conference San Jose(SNUG)'', March 2011. | ||
== Experience == | |||
; GPU Physical Design Engineer (06/2011 - Present) | |||
: Samsung Austin Research Center , Austin, TX | |||
; Read Channel Integration Intern(06/2010 - 01/2011) | |||
: LSI Corporation , Allentown, PA | |||
; Hardware Design Group Intern(01/2009 - 07/2009) | |||
: Texas Instruments , Bangalore, India | |||
==Contact Information== | ==Contact Information== | ||
| Line 27: | Line 37: | ||
Pennsylvania 19104 <br> | Pennsylvania 19104 <br> | ||
'''Phone:''' | '''Phone:''' <br> | ||
'''Email: ''' | '''Email: '''sharat.semi@gmail.com | ||
Latest revision as of 18:53, 25 March 2012
Education
M.S. in Computer Engineering, 2009-2011
- Drexel University, Philadelphia, Pennsylvania, USA
B.S. in Electronics and Communication Engineering, 2009
- Amrita University, Bangalore, India.
Research Interests
- Ultra Low Power circuit design.
- Physical Design methodology development.
- Parallel Computing.
Curriculum Vitae
Selected Publications
- Sharat Shekar and Michael Bowen, "Early Time-Based Block Specific Power Analysis Methodology Using PrimeTimePX", to appear in the Proceedings of Synopsys User Guide Conference San Jose(SNUG), March 2011.
Experience
- GPU Physical Design Engineer (06/2011 - Present)
- Samsung Austin Research Center , Austin, TX
- Read Channel Integration Intern(06/2010 - 01/2011)
- LSI Corporation , Allentown, PA
- Hardware Design Group Intern(01/2009 - 07/2009)
- Texas Instruments , Bangalore, India
Contact Information
Address:
3141 Chestnut Street
Department of ECE
Drexel University
Bossone 324
Philadelphia
Pennsylvania 19104
Phone:
Email: sharat.semi@gmail.com
