Sief Atari: Difference between revisions
From VLSILab
Jump to navigationJump to search
No edit summary |
(→Résumé) |
||
| (One intermediate revision by the same user not shown) | |||
| Line 10: | Line 10: | ||
* Applying metamaterials to integrated circuits | * Applying metamaterials to integrated circuits | ||
== | ==Curriculum Vitae== | ||
[[media: | [[media:sief_resume.pdf | Sief Atari (March 2023)]] | ||
==Contact Information== | ==Contact Information== | ||
Latest revision as of 13:25, 15 March 2023
Education
Ph.D. in Electrical Engineering, ongoing
- Drexel University, Philadelphia, PA, USA
B.S. in Electrical & Computer Engineering, 2022
- University of Bridgeport, Bridgeport, CT, USA
Research Interests
- System level interconnects for 2D chips and above
- Applying metamaterials to integrated circuits
Curriculum Vitae
Contact Information
Address:
3141 Chestnut Street
Drexel University
ECE Department
Philadelphia, PA 19104
Office: Bossone 405
Email: sa3848@drexel.edu
Linkedin: siefatari/linkedin
