Sharat C. Shekar: Difference between revisions
From VLSILab
Jump to navigationJump to search
No edit summary |
No edit summary |
||
Line 17: | Line 17: | ||
== Selected Publications == | == Selected Publications == | ||
# Sharat Shekar and Michael Bowen, "Early Time-Based Block Specific Power Analysis Methodology Using PrimeTimePX", to appear in the ''Proceedings of Synopsys User Guide Conference San Jose(SNUG)'', March 2011. | # Sharat Shekar and Michael Bowen, "Early Time-Based Block Specific Power Analysis Methodology Using PrimeTimePX", to appear in the ''Proceedings of Synopsys User Guide Conference San Jose(SNUG)'', March 2011. | ||
== Experience == | |||
; Read Channel Integration Intern(06/2010 - 01/2011) | |||
: LSI Corporation , Allentown, PA | |||
; Hardware Design Group Intern(01/2009 - 07/2009) | |||
: Texas Instruments , Bangalore, India | |||
==Contact Information== | ==Contact Information== |
Revision as of 17:45, 16 February 2011
Education
M.S. in Computer Engineering, 2009-Present
- Drexel University, Philadelphia, Pennsylvania, USA
B.S. in Electronics and Communication Engineering, 2009
- Amrita University, Bangalore, India.
Research Interests
- Ultra Low Power circuit design.
- Physical Design methodology development.
- Parallel Computing.
Curriculum Vitae
Selected Publications
- Sharat Shekar and Michael Bowen, "Early Time-Based Block Specific Power Analysis Methodology Using PrimeTimePX", to appear in the Proceedings of Synopsys User Guide Conference San Jose(SNUG), March 2011.
Experience
- Read Channel Integration Intern(06/2010 - 01/2011)
- LSI Corporation , Allentown, PA
- Hardware Design Group Intern(01/2009 - 07/2009)
- Texas Instruments , Bangalore, India
Contact Information
Address:
3141 Chestnut Street
Department of ECE
Drexel University
Bossone 324
Philadelphia
Pennsylvania 19104
Phone: (215) 895-4744
Email: ss3257@drexel.edu