Karthik Sangaiah: Difference between revisions

From VLSILab
Jump to navigationJump to search
(Created page with 'right|border|frame|[[Can Sitik|25px]] ==Education== '''Ph.D. in Computer Engineering, 2011 - Present''' <br> :Drexel University, Philadelphia, Pennsylvan...')
 
No edit summary
Line 1: Line 1:
[[File:profilpic.png|right|border|frame|[[Can Sitik]]|25px]]
<!--[[File:profilpic.png|right|border|frame|[[Can Sitik]]|25px]]-->


==Education==
<!--==Education==
'''Ph.D. in Computer Engineering, 2011 - Present''' <br>  
'''Ph.D. in Computer Engineering, 2013 - Present''' <br>  
:Drexel University, Philadelphia, Pennsylvania, USA
:[http://ece.drexel.edu Drexel University], Philadelphia, Pennsylvania


'''B.S. in [http://www.eee.metu.edu.tr Electrical and Electronics Engineering], 2011 ''' <br>
'''B.S. and M.S. in Computer Engineering, 2012 ''' <br>
:[http://metu.edu.tr Middle East Technical University(METU)], Ankara, Turkey
:[http://ece.drexel.edu Drexel University], Philadelphia, Pennsylvania


==Research Interests==
==Research Interests==
Line 24: Line 24:
# Can Sitik and Baris Taskin, "Implementation of Domain-Specific Clock Meshes for Multi-Voltage SoCs with IC Compiler", ''Proceedings of Synopsys User Groups Conference (SNUG) Silicon Valley'', March 2013.
# Can Sitik and Baris Taskin, "Implementation of Domain-Specific Clock Meshes for Multi-Voltage SoCs with IC Compiler", ''Proceedings of Synopsys User Groups Conference (SNUG) Silicon Valley'', March 2013.
# Can Sitik and Baris Taskin, "Multi-Voltage Domain Clock Mesh Design", ''Proceedings of the IEEE International Conference on Computer Design (ICCD)'', October 2012, pp. 201--206.
# Can Sitik and Baris Taskin, "Multi-Voltage Domain Clock Mesh Design", ''Proceedings of the IEEE International Conference on Computer Design (ICCD)'', October 2012, pp. 201--206.
[http://scholar.google.com/citations?user=ZwNZgjAAAAAJ&hl=en '''Google Scholar Page''']
[http://scholar.google.com/citations?user=ZwNZgjAAAAAJ&hl=en '''Google Scholar Page''']-->


==Teaching==
==Teaching==
* ECE-C302: [http://ece.drexel.edu/courses/ECE-C302/ Digital Systems Projects] (Fall, Spring 2013)
* ECE-C302: [http://ece.drexel.edu/courses/ECE-C302/ Digital Systems Projects] (Fall, Spring 2013)
* ECE-C304: Design with Microcontrollers (Winter, Summer 2012,13)
 
* ENGR-231: Linear Engineering Systems (Spring, Fall 2012)
<!--:Please refer to my [[Weekly Schedule]] to ask for an appointment-->
* ECE-E421: Advanced Electronics I (Fall 2011)
:Please refer to my [[Weekly Schedule]] to ask for an appointment


==Contact Information==
==Contact Information==
Line 41: Line 39:
Philadelphia, PA 19104 <br>
Philadelphia, PA 19104 <br>


'''Email:''' [mailto:as3577@drexel.edu as3577@drexel.edu] <br>
'''Email:''' [mailto:ks499@drexel.edu ks499@drexel.edu] <br>


'''Linkedin:''' [http://www.linkedin.com/profile/view?id=147018021&trk=hb_tab_pro_top A. Can Sitik]
'''Linkedin:''' [http://www.linkedin.com/pub/karthik-sangaiah/9/780/4ab Karthik Sangaiah]

Revision as of 15:37, 24 October 2013


Teaching


Contact Information

Address:
3141 Chestnut Street
Department of ECE
Drexel University
Bossone 324
Philadelphia, PA 19104

Email: ks499@drexel.edu

Linkedin: Karthik Sangaiah