Main Page: Difference between revisions
From VLSILab
Jump to navigationJump to search
No edit summary |
|||
Line 57: | Line 57: | ||
== [[Research]] == | == [[Research]] == | ||
[[Research#CMP-NoC Co-design|CMP-NoC Co-design]] | [[Research#CMP-NoC Co-design|CMP-NoC Co-design]] | ||
[[Research#Design and Automation of Low Swing Clocking|Design and Automation of Low Swing Clocking]] | [[Research#Design and Automation of Low Swing Clocking|Design and Automation of Low Swing Clocking]] | ||
Line 68: | Line 67: | ||
[[Research#Ultra Low-Power Adiabatic Circuit Design|Ultra Low-Power Adiabatic Circuit Design]] | [[Research#Ultra Low-Power Adiabatic Circuit Design|Ultra Low-Power Adiabatic Circuit Design]] | ||
[[Research#Energy Efficient Computing with OptoElectronics|Energy Efficient Computing with OptoElectronics]] | |||
== [[Publications]] == | == [[Publications]] == |
Revision as of 08:35, 31 January 2016
Drexel VLSI and Architecture Laboratory (http://vlsi.ece.drexel.edu)
Department of Electrical and Computer Engineering
324 Bossone Research Center
Philadelphia, PA 19104
People
Faculty
Ph.D. students
Ragh Kuttappa
Other researchers
See People
Research
Design and Automation of Low Swing Clocking
Wireless On-Chip Interconnects
Ultra Low-Power Adiabatic Circuit Design
Energy Efficient Computing with OptoElectronics