Jianchao Lu: Difference between revisions

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Jianchao Lu received his B.S. in Electronic and Information Engineering from Zhejiang University in 2007. Currently he is working towards Ph.D. degree in the Electrical and Computer Engineering Department at Drexel University.
==Education==
'''Ph.D. in Computer Engineering, 2011 (expected)''' <br>
:Drexel University, Philadelphia, Pennsylvania, USA
 
'''M.S. in Computer Engineering, 2009 ''' <br>
:Drexel University, Philadelphia, Pennsylvania, USA
 
'''B.S. in Electronics and Information Engineering, 2007''' <br>
:Zhejiang University, Hangzhou, China.
 
==Research Interests==
* Clock Network Synthesis including Clock Tree/Mesh Synthesis and Resonant Clocking
* Physical Design in general including Floorplanning, Placement and Routing
* Clock Skew Scheduling
* Static and Statistical Timing analysis
* Parallel Computing
 
==Curriculum Vitae==
[http://ece.drexel.edu/faculty/taskin/wiki/vlsilab/images/1/19/Jlu_v2.pdf Jianchao CV]
 
== Publications ==
To see publications by the VLSI Lab at Drexel University please [[Publications|click here]]
 
==Contact Information==
'''Address:''' <br>
3141 Chestnut Street <br>
Department of ECE <br>
Drexel University <br>
Bossone 324 <br>
Philadelphia <br>
Pennsylvania 19104 <br>
 
'''Phone:''' (215) 301-8795 <br>
'''Fax:''' (215) 895-1695 <br>
'''Email: ''"jl597@drexel.edu

Revision as of 20:44, 18 October 2010

Education

Ph.D. in Computer Engineering, 2011 (expected)

Drexel University, Philadelphia, Pennsylvania, USA

M.S. in Computer Engineering, 2009

Drexel University, Philadelphia, Pennsylvania, USA

B.S. in Electronics and Information Engineering, 2007

Zhejiang University, Hangzhou, China.

Research Interests

  • Clock Network Synthesis including Clock Tree/Mesh Synthesis and Resonant Clocking
  • Physical Design in general including Floorplanning, Placement and Routing
  • Clock Skew Scheduling
  • Static and Statistical Timing analysis
  • Parallel Computing

Curriculum Vitae

Jianchao CV

Publications

To see publications by the VLSI Lab at Drexel University please click here

Contact Information

Address:
3141 Chestnut Street
Department of ECE
Drexel University
Bossone 324
Philadelphia
Pennsylvania 19104

Phone: (215) 301-8795
Fax: (215) 895-1695
'Email: "jl597@drexel.edu