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- [http://ece.drexel.edu/faculty/taskin/wiki/vlsilab/images/f/fd/Vinayak_CV.pdf Vinayak CV] '''Email:''' vinayak.honkote@gmail.com2 KB (214 words) - 00:26, 12 January 2013
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- # Vinayak Honkote, Ankit More and Baris Taskin, "3-D Parasitic Modeling for Rotary In # Vinayak Honkote, Ankit More, Ying Teng, Jianchao Lu and Baris Taskin, "Interconnect4 KB (555 words) - 22:21, 18 December 2015
- [http://ece.drexel.edu/faculty/taskin/wiki/vlsilab/images/f/fd/Vinayak_CV.pdf Vinayak CV] '''Email:''' vinayak.honkote@gmail.com2 KB (214 words) - 00:26, 12 January 2013
- # Jianchao Lu, Vinayak Honkote, Xin Chen and Baris Taskin, "Steiner Tree Based Rotary Clock Routin # Vinayak Honkote, Ankit More, Ying Teng, Jianchao Lu and Baris Taskin, "Interconnect5 KB (675 words) - 21:15, 8 November 2012
- ...locking" with Prof. Matthew Guthaus of UCSC and Drexel VLSI Lab Alumni Dr. Vinayak Honkote of Intel at the IEEE/ACM International Conference on Computer-Aided * Vinayak received the first N. Bilgutay fellowship from the Department of Electrical12 KB (1,581 words) - 10:22, 5 February 2025
- Vinayak Honkote, Ph.D., Ragh Kuttappa, Intel, OR (co-authors on research products) * Nicholas Sica, Ragh Kuttappa, Vinayak Honkote, Baris Taskin, "High Speed Phase-Based Computing", Proceedings of t8 KB (1,112 words) - 08:44, 15 October 2024
- #Nicholas Sica, Ragh Kuttappa, Vinayak Honkote, Baris Taskin, "High Speed Phase-Based Computing", ''Proceedings of #Ragh Kuttappa, Baris Taskin, Vinayak Honkote, Satish Yada, Jainaveen Sundaram, Dileep Kurian, Tanay Karnik, and45 KB (5,951 words) - 10:04, 30 September 2025
- [[Vinayak Honkote]] (Ph.D., 2010), [First job: Intel], Dissertation: ''Design Automat6 KB (812 words) - 08:10, 26 August 2025
- Ph.D. Student(s): [[Ragh Kuttappa]] (graduated), [[Ying Teng]] (graduated), [[Vinayak Honkote]] (graduated), [[Ankit More]] (graduated), [[Jianchao Lu]] (graduat Collaborator(s): Ragh Kuttappa (Intel), Vinayak Honkote (Intel)17 KB (2,364 words) - 10:15, 5 February 2025