Main Page: Difference between revisions
From VLSILab
Jump to navigationJump to search
No edit summary |
No edit summary |
||
| Line 32: | Line 32: | ||
== [[People]] == | == [[People]] == | ||
[[Leo Filippini]] | |||
[[Scott Lerner]] | |||
[[Michael Lui]] | |||
[[Vasil Pano]] | |||
[[Karthik Sangaiah]] | |||
[[Can Sitik]] | |||
== [[Research]] == | == [[Research]] == | ||
[[Research#CMP-NoC Co-design|CMP-NoC Co-design]] | |||
[[Research#Embedded System Co-design|Embedded System Co-design]] | |||
[[Research#Design and Automation of Low Swing Clocking|Design and Automation of Low Swing Clocking]] | |||
[[Research#Wireless On-Chip Interconnects|Wireless On-Chip Interconnects]] | |||
[[Research#Clock Tree/Mesh Synthesis|Clock Tree/Mesh Synthesis]] | |||
[[Research#Ultra Low-Power Adiabatic Circuit Design|Ultra Low-Power Adiabatic Circuit Design]] | |||
== [[Publications]] == | == [[Publications]] == | ||
Revision as of 12:11, 17 March 2015
Drexel VLSI Laboratory (http://vlsi.ece.drexel.edu)
Department of Electrical and Computer Engineering
324 Bossone Research Center
Philadelphia, PA 19104
People
Research
Design and Automation of Low Swing Clocking
Wireless On-Chip Interconnects
Ultra Low-Power Adiabatic Circuit Design
