Scott Lerner: Difference between revisions

From VLSILab
Jump to navigationJump to search
No edit summary
No edit summary
Line 1: Line 1:
==Education==  
==Education==  
'''Ph.D. in Computer Engineering, 2009-Present''' <br>
'''B.S. in Electrical and Computer Engineering, 2014''' <br>
:Drexel University, Philadelphia, Pennsylvania, USA
:Drexel University, Philadelphia, PA.
 
'''M.S. in Computer Engineering, 2007 ''' <br>
:Tianjin University, Tianjin, China
 
'''B.S. in Electrical and Computer Engineering, 2004''' <br>
:Tianjin University, Tianjin, China.


==Research Interests==
==Research Interests==
* Physical Design in general including Floorplanning, Placement and Routing
* Physical Design including Floorplanning, Placement and Routing
* Modeling of Interconnects
* Interconnect Modeling
 
* Low-swing Clock Tree Topologies


==Curriculum Vitae==
==Curriculum Vitae==
[[media:Scott_CV_Feb26(1).pdf‎ | Scott Lerner CV (Feb 2014)]]
[[media:Scott_CV_Feb26(1).pdf‎ | Scott Lerner CV (Feb 2014)]]


== Poster Presentations ==
# S. Lerner, C. Sitik, and B. Taskin,


== Selected Publications ==
== Selected Publications ==
# Y. Teng and B. Taskin, "Rotary Traveling Wave Oscillator Frequency Division at Nanoscale Technologies", to appear in the ''Proceedings of IEEE Great Lakes Symposium on VLSI (GLSVLSI)'', May 2013.
# Y. Teng and B. Taskin, "Rotary Traveling Wave Oscillator Frequency Division at Nanoscale Technologies", to appear in the ''Proceedings of IEEE Great Lakes Symposium on VLSI (GLSVLSI)'', May 2013.
# Y. Teng and B. Taskin, "Sparse-Rotary Oscillator Array (SROA) Design for Power and Skew Reduction", to appear in the ''Proceedings of IEEE Design Automation and Test in Europe (DATE)'', March 2013.
 
# Y. Teng and B. Taskin, "Clock Mesh Synthesis Method using the Earth Mover’s Distance under Transformations", ''Proceedings of the IEEE International Conference on Computer Design (ICCD)'', Oct. 2012, pp.121--126.
== Selected Projects ==
# Y. Teng and B. Taskin, "Synchronization Scheme for Brick-based Rotary Oscillator Arrays", ''Proceedings of IEEE Great Lakes Symposium on VLSI (GLSVLSI)'', May 2012.
#  
# Y. Teng, J. Lu and B. Taskin, "ROA-brick Topology for Rotary Resonant Clocks", ''Proceedings of the IEEE International Conference on Computer Design (ICCD)'', Oct. 2011, pp.273--278.
# J. Lu, Y. Teng and B. Taskin, "A Reconfigur​able Clock Polarity Assignment Flow for Clock Gated Designs", ''IEEE Transactions on Very Large Scale Integration Systems (TVLSI)''.
# Y. Teng and B. Taskin, “Process Variation Sensitivity of the Rotary Traveling Wave Oscillator”, ''Proceedings of the IEEE International Symposium on Quality Electronic Design (ISQED)'', March 2011.
# Y. Teng and B. Taskin, “Look-up Table Based Low Power Rotary Travelling Wave Oscillator Design Considering the Skin Effect”, ''Journal of Low Power Electronics (JOLPE)'' [featured on the cover page].
# V. Honkote, A. More, Y. Teng, J. Lu and B. Taskin, "Interconnect Modeling, Synchronization and Power Analysis for Custom Rotary Rings", to appear in the ''Proceedings of the International Conference on VLSI Design (VLSID)'', January 2011.


==Contact Information==
==Contact Information==

Revision as of 12:54, 19 March 2014

Education

B.S. in Electrical and Computer Engineering, 2014

Drexel University, Philadelphia, PA.

Research Interests

  • Physical Design including Floorplanning, Placement and Routing
  • Interconnect Modeling
  • Low-swing Clock Tree Topologies

Curriculum Vitae

Scott Lerner CV (Feb 2014)

Poster Presentations

  1. S. Lerner, C. Sitik, and B. Taskin,

Selected Publications

  1. Y. Teng and B. Taskin, "Rotary Traveling Wave Oscillator Frequency Division at Nanoscale Technologies", to appear in the Proceedings of IEEE Great Lakes Symposium on VLSI (GLSVLSI), May 2013.

Selected Projects

Contact Information

Address:
3141 Chestnut Street
Department of ECE
Drexel University
Bossone 324
Philadelphia
Pennsylvania 19104

Phone: (863) 307-6194
Fax: (215) 895-1695
Email: spl29@drexel.edu