Sief Atari: Difference between revisions
From VLSILab
Jump to navigationJump to search
(→Résumé) |
|||
| (5 intermediate revisions by the same user not shown) | |||
| Line 1: | Line 1: | ||
==Education== | ==Education== | ||
'''Ph.D. in | '''Ph.D. in Electrical Engineering, ongoing''' <br> | ||
:Drexel University, Philadelphia, PA, USA | :Drexel University, Philadelphia, PA, USA | ||
'''B.S. in | '''B.S. in Electrical & Computer Engineering, 2022''' <br> | ||
:University, | :University of Bridgeport, Bridgeport, CT, USA | ||
==Research Interests== | ==Research Interests== | ||
* | * System level interconnects for 2D chips and above | ||
* | * Applying metamaterials to integrated circuits | ||
== | ==Curriculum Vitae== | ||
[[media: | [[media:sief_resume.pdf | Sief Atari (March 2023)]] | ||
==Contact Information== | ==Contact Information== | ||
| Line 29: | Line 21: | ||
'''Office:''' Bossone 405 <br> | '''Office:''' Bossone 405 <br> | ||
'''Email:''' | '''Email:''' sa3848@drexel.edu <br> | ||
'''Linkedin:''' [https://www.linkedin.com/in/ | '''Linkedin:''' [https://www.linkedin.com/in/siefatari/ siefatari/linkedin] <br> | ||
Latest revision as of 14:25, 15 March 2023
Education
Ph.D. in Electrical Engineering, ongoing
- Drexel University, Philadelphia, PA, USA
B.S. in Electrical & Computer Engineering, 2022
- University of Bridgeport, Bridgeport, CT, USA
Research Interests
- System level interconnects for 2D chips and above
- Applying metamaterials to integrated circuits
Curriculum Vitae
Contact Information
Address:
3141 Chestnut Street
Drexel University
ECE Department
Philadelphia, PA 19104
Office: Bossone 405
Email: sa3848@drexel.edu
Linkedin: siefatari/linkedin
