Karthik Sangaiah: Difference between revisions

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==Publications==
==Publications==
#K. Sangaiah, M. Lui, R. Jagtap, S. Diestelhorst, S. Nilakantan, A. More, B. Taskin, and M. Hempstead, "SynchroTrace: Synchronization-aware Architecture-agnostic Traces for Light-Weight Multicore Simulation of CMP and HPC Workloads", ACM Transactions on Architecture and Code Optimization (TACO), In Progress.
#K. Sangaiah, M. Lui, R. Jagtap, S. Diestelhorst, S. Nilakantan, A. More, B. Taskin, and M. Hempstead, "SynchroTrace: Synchronization-aware Architecture-agnostic Traces for Light-Weight Multicore Simulation of CMP and HPC Workloads", ACM Transactions on Architecture and Code Optimization (TACO), In Print.
#K. Sangaiah, B. Taskin, and M. Hempstead, "Fast Multicore Simulation and Performance Analysis of HPC Applications with SynchroTrace", Boston Area Architecture (BARC) Workshop, January 2016.
#K. Sangaiah, B. Taskin, and M. Hempstead, "Fast Multicore Simulation and Performance Analysis of HPC Applications with SynchroTrace", Boston Area Architecture (BARC) Workshop, January 2016.
#K. Sangaiah, M. Hempstead and B. Taskin, “Uncore RPD: Rapid Design Space Exploration of the Uncore via Regression Modeling”, Proceedings of the IEEE/ACM International Conference on Computer-Aided Design (ICCAD), November 2015, pp. 365–372.
#K. Sangaiah, M. Hempstead and B. Taskin, “Uncore RPD: Rapid Design Space Exploration of the Uncore via Regression Modeling”, Proceedings of the IEEE/ACM International Conference on Computer-Aided Design (ICCAD), November 2015, pp. 365–372.
#Siddharth Nilakantan, Karthik Sangaiah, Ankit More, Gio Salvador, Baris Taskin, Mark Hempstead, ”SynchroTrace: Synchronization-aware Architecture-agnostic Traces for Light-Weight Multi-core Simulation”, Proceedings of IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2015), 29-31 March 2015, pp. 278-287.
#S. Nilakantan, K. Sangaiah, A. More, G. Salvador, B. Taskin, M. Hempstead, ”SynchroTrace: Synchronization-aware Architecture-agnostic Traces for Light-Weight Multi-core Simulation”, Proceedings of IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2015), 29-31 March 2015, pp. 278-287.
#K. Sangaiah and P. Nagvajara, "Variable fractional digital delay filter on reconfigurable hardware," in Proceedings of IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS 2012), 5-8 August 2012, pp. 430-433.
#K. Sangaiah and P. Nagvajara, "Variable fractional digital delay filter on reconfigurable hardware," in Proceedings of IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS 2012), 5-8 August 2012, pp. 430-433.
# Nilakantan, S.; Annangi, S.; Gulati, N.; Sangaiah, K.; Hempstead, M., "Evaluation of an accelerator architecture for Speckle Reducing Anisotropic Diffusion," Compilers, Architectures and Synthesis for Embedded Systems (CASES), 2011 Proceedings of the 14th International Conference on, 9-14 Oct. 2011, pp.185-194.
#S. Nilakantan, S. Annangi, N. Gulati, K. Sangaiah, M. Hempstead, "Evaluation of an accelerator architecture for Speckle Reducing Anisotropic Diffusion," Compilers, Architectures and Synthesis for Embedded Systems (CASES), 2011 Proceedings of the 14th International Conference on, 9-14 Oct. 2011, pp.185-194.


==Teaching==
==Teaching==

Revision as of 14:04, 14 February 2018


Education

Ph.D. in Computer Engineering, 2013 - Present

Drexel University, Philadelphia, Pennsylvania

B.S. and M.S. in Computer Engineering, 2012

Drexel University, Philadelphia, Pennsylvania

Research Interests

  • Computer Architecture
  • High Performance Computing
  • Networks-on-Chip
  • Heterogeneous Computing

Curriculum Vitae

Karthik Sangaiah CV (Feb. 2018)

Publications

  1. K. Sangaiah, M. Lui, R. Jagtap, S. Diestelhorst, S. Nilakantan, A. More, B. Taskin, and M. Hempstead, "SynchroTrace: Synchronization-aware Architecture-agnostic Traces for Light-Weight Multicore Simulation of CMP and HPC Workloads", ACM Transactions on Architecture and Code Optimization (TACO), In Print.
  2. K. Sangaiah, B. Taskin, and M. Hempstead, "Fast Multicore Simulation and Performance Analysis of HPC Applications with SynchroTrace", Boston Area Architecture (BARC) Workshop, January 2016.
  3. K. Sangaiah, M. Hempstead and B. Taskin, “Uncore RPD: Rapid Design Space Exploration of the Uncore via Regression Modeling”, Proceedings of the IEEE/ACM International Conference on Computer-Aided Design (ICCAD), November 2015, pp. 365–372.
  4. S. Nilakantan, K. Sangaiah, A. More, G. Salvador, B. Taskin, M. Hempstead, ”SynchroTrace: Synchronization-aware Architecture-agnostic Traces for Light-Weight Multi-core Simulation”, Proceedings of IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2015), 29-31 March 2015, pp. 278-287.
  5. K. Sangaiah and P. Nagvajara, "Variable fractional digital delay filter on reconfigurable hardware," in Proceedings of IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS 2012), 5-8 August 2012, pp. 430-433.
  6. S. Nilakantan, S. Annangi, N. Gulati, K. Sangaiah, M. Hempstead, "Evaluation of an accelerator architecture for Speckle Reducing Anisotropic Diffusion," Compilers, Architectures and Synthesis for Embedded Systems (CASES), 2011 Proceedings of the 14th International Conference on, 9-14 Oct. 2011, pp.185-194.

Teaching

Contact Information

Address:
3141 Chestnut Street
Department of ECE
Drexel University
Bossone 324
Philadelphia, PA 19104

Email: ks499@drexel.edu

Linkedin: Karthik Sangaiah

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