Karthik Sangaiah: Difference between revisions
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==Publications== | ==Publications== | ||
#M. Lui, K. Sangaiah, M. Hempstead, and B. Taskin, "Towards Cross-Framework Workload Analysis via Flexible Event-Driven Interfaces", IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Belfast, Northern Ireland, April 2018. | #M. Lui, K. Sangaiah, M. Hempstead, and B. Taskin, "Towards Cross-Framework Workload Analysis via Flexible Event-Driven Interfaces", IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Belfast, Northern Ireland, April 2018. | ||
#K. Sangaiah, M. Lui, R. Jagtap, S. Diestelhorst, S. Nilakantan, A. More, B. Taskin, and M. Hempstead, "SynchroTrace: Synchronization-aware Architecture-agnostic Traces for Light-Weight Multicore Simulation of CMP and HPC Workloads", ACM Transactions on Architecture and Code Optimization (TACO), | |||
Karthik Sangaiah, Michael Lui, Radhika Jagtap, Stephan Diestelhorst, Siddharth Nilakantan, Ankit More, Baris Taskin, and Mark Hempstead. 2018. SynchroTrace: Synchronization-Aware Architecture-Agnostic Traces for Lightweight Multicore Simulation of CMP and HPC Workloads. ACM Trans. Archit. Code Optim. 15, 1, Article 2 (March 2018), 26 pages. DOI: https://doi.org/10.1145/3158642 | |||
#K. Sangaiah, M. Lui, R. Jagtap, S. Diestelhorst, S. Nilakantan, A. More, B. Taskin, and M. Hempstead, "SynchroTrace: Synchronization-aware Architecture-agnostic Traces for Light-Weight Multicore Simulation of CMP and HPC Workloads", ACM Transactions on Architecture and Code Optimization (TACO), Volume 15, Issue 1, April 2018 [PDF]. | |||
#K. Sangaiah, B. Taskin, and M. Hempstead, "Fast Multicore Simulation and Performance Analysis of HPC Applications with SynchroTrace", Boston Area Architecture (BARC) Workshop, January 2016. | #K. Sangaiah, B. Taskin, and M. Hempstead, "Fast Multicore Simulation and Performance Analysis of HPC Applications with SynchroTrace", Boston Area Architecture (BARC) Workshop, January 2016. | ||
#K. Sangaiah, M. Hempstead and B. Taskin, “Uncore RPD: Rapid Design Space Exploration of the Uncore via Regression Modeling”, Proceedings of the IEEE/ACM International Conference on Computer-Aided Design (ICCAD), November 2015, pp. 365–372. | #K. Sangaiah, M. Hempstead and B. Taskin, “Uncore RPD: Rapid Design Space Exploration of the Uncore via Regression Modeling”, Proceedings of the IEEE/ACM International Conference on Computer-Aided Design (ICCAD), November 2015, pp. 365–372. | ||
Revision as of 16:43, 6 April 2018
Education
Ph.D. in Computer Engineering, 2013 - Present
- Drexel University, Philadelphia, Pennsylvania
B.S. and M.S. in Computer Engineering, 2012
- Drexel University, Philadelphia, Pennsylvania
Research Interests
- Computer Architecture
- High Performance Computing
- Networks-on-Chip
- Heterogeneous Computing
Curriculum Vitae
Karthik Sangaiah CV (Feb. 2018)
Publications
- M. Lui, K. Sangaiah, M. Hempstead, and B. Taskin, "Towards Cross-Framework Workload Analysis via Flexible Event-Driven Interfaces", IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Belfast, Northern Ireland, April 2018.
Karthik Sangaiah, Michael Lui, Radhika Jagtap, Stephan Diestelhorst, Siddharth Nilakantan, Ankit More, Baris Taskin, and Mark Hempstead. 2018. SynchroTrace: Synchronization-Aware Architecture-Agnostic Traces for Lightweight Multicore Simulation of CMP and HPC Workloads. ACM Trans. Archit. Code Optim. 15, 1, Article 2 (March 2018), 26 pages. DOI: https://doi.org/10.1145/3158642
- K. Sangaiah, M. Lui, R. Jagtap, S. Diestelhorst, S. Nilakantan, A. More, B. Taskin, and M. Hempstead, "SynchroTrace: Synchronization-aware Architecture-agnostic Traces for Light-Weight Multicore Simulation of CMP and HPC Workloads", ACM Transactions on Architecture and Code Optimization (TACO), Volume 15, Issue 1, April 2018 [PDF].
- K. Sangaiah, B. Taskin, and M. Hempstead, "Fast Multicore Simulation and Performance Analysis of HPC Applications with SynchroTrace", Boston Area Architecture (BARC) Workshop, January 2016.
- K. Sangaiah, M. Hempstead and B. Taskin, “Uncore RPD: Rapid Design Space Exploration of the Uncore via Regression Modeling”, Proceedings of the IEEE/ACM International Conference on Computer-Aided Design (ICCAD), November 2015, pp. 365–372.
- S. Nilakantan, K. Sangaiah, A. More, G. Salvador, B. Taskin, M. Hempstead, ”SynchroTrace: Synchronization-aware Architecture-agnostic Traces for Light-Weight Multi-core Simulation”, Proceedings of IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2015), 29-31 March 2015, pp. 278-287.
- K. Sangaiah and P. Nagvajara, "Variable fractional digital delay filter on reconfigurable hardware," in Proceedings of IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS 2012), 5-8 August 2012, pp. 430-433.
- S. Nilakantan, S. Annangi, N. Gulati, K. Sangaiah, M. Hempstead, "Evaluation of an accelerator architecture for Speckle Reducing Anisotropic Diffusion," Compilers, Architectures and Synthesis for Embedded Systems (CASES), 2011 Proceedings of the 14th International Conference on, 9-14 Oct. 2011, pp.185-194.
Teaching
- ECE-C301: Advanced Programming for Engineers (Fall 2017)
- ECE-C302: Digital Systems Projects (Fall 2013, Spring 2014, Fall 2017)
- ECE-C304: Design with Microcontrollers (Winter 2014)
- ECE-C355: Computer Architecture (Summer 2014, Winter 2017)
- ECE 203: Programming for Engineers (Winter 2018)
- ENGR 121: Computation Lab I (Fall 2017)
Contact Information
Address:
3141 Chestnut Street
Department of ECE
Drexel University
Bossone 405
Philadelphia, PA 19104
Email: ks499@drexel.edu
Linkedin: Karthik Sangaiah
