Can Sitik: Difference between revisions
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* ECE-C302: [http://ece.drexel.edu/courses/ECE-C302/ Digital Systems Projects] (Fall, Spring 2013) | * ECE-C302: [http://ece.drexel.edu/courses/ECE-C302/ Digital Systems Projects] (Fall, Spring 2013) | ||
* ENGR-231: Linear Engineering Systems (Spring, Fall 2012) | * ENGR-231: Linear Engineering Systems (Spring, Fall 2012) | ||
* ECE-E421: Advanced Electronics I (Fall 2011) | * ECE-E421: [[http://www.ece.drexel.edu/courses/ECE-E421/ Advanced Electronics I]] (Fall 2011) | ||
:Please refer to my [[Weekly Schedule]] to ask for an appointment | :Please refer to my [[Weekly Schedule]] to ask for an appointment | ||
Revision as of 16:52, 24 February 2014
Education
Ph.D. in Computer Engineering, 2011 - Present
- Drexel University, Philadelphia, Pennsylvania, USA
M.S. in Computer Engineering, 2013
- Drexel University, Philadelphia, Pennsylvania, USA
B.S. in Electrical and Electronics Engineering, 2011
- Middle East Technical University(METU), Ankara, Turkey
Research Interests
- Low Swing Clock Tree Synthesis
- Clock Mesh Synthesis, clock mesh benefits
- Electronic Design Automation(EDA) for VLSI, what is EDA?
- Clock Network Design with FinFETs
- Physical Design of System-on-Chips
Curriculum Vitae
Publications
- Can Sitik and Baris Taskin, "Iterative Skew Minimization for Low Swing Clocks", (accepted to) Elsevier Integration, the VLSI Journal, in Press.
- Can Sitik, Prawat Nagvajara and Baris Taskin, "A Microcontroller-Based Embedded System Design Course with PSoC3", Proceedings of the IEEE International Conference on Microelectronic Systems Education (MSE), June 2013, pp. 28--31.
- Can Sitik and Baris Taskin, "Multi-Corner Multi-Voltage Domain Clock Mesh Design", Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI), May 2013, pp. 209--214.
- Can Sitik and Baris Taskin, "Skew-Bounded Low Swing Clock Tree Optimization", Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI), May 2013, pp. 49--54 Best Paper Nominee.
- Can Sitik and Baris Taskin, "Implementation of Domain-Specific Clock Meshes for Multi-Voltage SoCs with IC Compiler", Proceedings of Synopsys User Groups Conference (SNUG) Silicon Valley, March 2013.
- Can Sitik and Baris Taskin, "Multi-Voltage Domain Clock Mesh Design", Proceedings of the IEEE International Conference on Computer Design (ICCD), October 2012, pp. 201--206.
Teaching
- ECE-C304: Design with Microcontrollers (Winter 2012-14, Summer 2012,13)
- ECE-C302: Digital Systems Projects (Fall, Spring 2013)
- ENGR-231: Linear Engineering Systems (Spring, Fall 2012)
- ECE-E421: [Advanced Electronics I] (Fall 2011)
- Please refer to my Weekly Schedule to ask for an appointment
Contact Information
Address:
3141 Chestnut Street
Department of ECE
Drexel University
Bossone 324
Philadelphia, PA 19104
Email: as3577@drexel.edu
Linkedin: A. Can Sitik
