Leo Filippini

From VLSILab
Revision as of 16:43, 7 January 2016 by Leo (talk | contribs)
Jump to navigationJump to search

Education

Ph.D. in Electronic Engineering, ongoing

Drexel University, Philadelphia, PA, USA

M.S. in Electronic Engineering, 2013

University of Brescia, Brescia, Italy

M.S. in Information Engineering, 2010

University of Brescia, Brescia, Italy

Research Interests

  • Adiabatic and Charge Recycling logic
  • Low-swing flip flops

Résumé

Leo Filippini - November 2014

Publications

Journals

  1. Can Sitik, Emre Salman, Leo Filippini, Sung Jun Yoon and Baris Taskin, "FinFET-Based Low Swing Clocking", ACM Journal of Emerging Technologies in Computing Systems (JETC).

Conferences

  1. Leo Filippini, Emre Salman and Baris Taskin, "A Wirelessly Powered System with Charge Recovery Logic", "IEEE International Conference on Computer Design" (ICCD), October 2015. link
  2. Can Sitik, Leo Filippini, Emre Salman and Baris Taskin, "High Performance Low Swing Clock Tree Synthesis with Custom D Flip-Flop Design", Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI), July 2014. link

Contact Information

Address:
3141 Chestnut Street
Drexel University
ECE Department
Philadelphia, PA 19104

Office: Bossone 324
Email: lf458@drexel.edu